FRITZ3370-REV2.dtsi 5.2 KB

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  1. #include "vr9.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. #include <dt-bindings/mips/lantiq_rcu_gphy.h>
  4. / {
  5. compatible = "avm,fritz3370-rev2", "lantiq,xway", "lantiq,vr9";
  6. model = "AVM FRITZ!Box 3370 Rev. 2";
  7. chosen {
  8. bootargs = "console=ttyLTQ0,115200";
  9. };
  10. aliases {
  11. led-boot = &power_green;
  12. led-failsafe = &power_red;
  13. led-running = &power_green;
  14. led-upgrade = &power_green;
  15. led-dsl = &dsl;
  16. led-internet = &info_green;
  17. led-wifi = &wifi;
  18. };
  19. memory@0 {
  20. reg = <0x0 0x8000000>;
  21. };
  22. gpio-poweroff {
  23. compatible = "gpio-poweroff";
  24. gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
  25. };
  26. gpio-keys-polled {
  27. compatible = "gpio-keys-polled";
  28. #address-cells = <1>;
  29. #size-cells = <0>;
  30. poll-interval = <100>;
  31. power {
  32. label = "power";
  33. gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
  34. linux,code = <KEY_POWER>;
  35. };
  36. wifi {
  37. label = "wlan";
  38. gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
  39. linux,code = <KEY_WLAN>;
  40. };
  41. };
  42. gpio-leds {
  43. compatible = "gpio-leds";
  44. power_green: power {
  45. label = "fritz3370:green:power";
  46. gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
  47. default-state = "keep";
  48. };
  49. power_red: power2 {
  50. label = "fritz3370:red:power";
  51. gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  52. };
  53. info_red {
  54. label = "fritz3370:red:info";
  55. gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
  56. };
  57. wifi: wifi {
  58. label = "fritz3370:green:wlan";
  59. gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
  60. };
  61. dsl: dsl {
  62. label = "fritz3370:green:dsl";
  63. gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  64. };
  65. lan {
  66. label = "fritz3370:green:lan";
  67. gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
  68. };
  69. info_green: info_green {
  70. label = "fritz3370:green:info";
  71. gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
  72. };
  73. };
  74. usb0_vbus: regulator-usb0-vbus {
  75. compatible = "regulator-fixed";
  76. regulator-name = "USB0_VBUS";
  77. regulator-min-microvolt = <5000000>;
  78. regulator-max-microvolt = <5000000>;
  79. gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
  80. enable-active-high;
  81. };
  82. usb1_vbus: regulator-usb1-vbus {
  83. compatible = "regulator-fixed";
  84. regulator-name = "USB1_VBUS";
  85. regulator-min-microvolt = <5000000>;
  86. regulator-max-microvolt = <5000000>;
  87. gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
  88. enable-active-high;
  89. };
  90. };
  91. &eth0 {
  92. lan: interface@0 {
  93. compatible = "lantiq,xrx200-pdi";
  94. #address-cells = <1>;
  95. #size-cells = <0>;
  96. reg = <0>;
  97. lantiq,switch;
  98. ethernet@0 {
  99. compatible = "lantiq,xrx200-pdi-port";
  100. reg = <0>;
  101. phy-mode = "rgmii";
  102. phy-handle = <&phy0>;
  103. gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  104. };
  105. ethernet@1 {
  106. compatible = "lantiq,xrx200-pdi-port";
  107. reg = <1>;
  108. phy-mode = "rgmii";
  109. phy-handle = <&phy1>;
  110. gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
  111. };
  112. ethernet@2 {
  113. compatible = "lantiq,xrx200-pdi-port";
  114. reg = <2>;
  115. phy-mode = "gmii";
  116. phy-handle = <&phy11>;
  117. };
  118. ethernet@4 {
  119. compatible = "lantiq,xrx200-pdi-port";
  120. reg = <4>;
  121. phy-mode = "gmii";
  122. phy-handle = <&phy13>;
  123. };
  124. };
  125. mdio@0 {
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. compatible = "lantiq,xrx200-mdio";
  129. reg = <0>;
  130. phy0: ethernet-phy@0 {
  131. reg = <0x0>;
  132. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  133. };
  134. phy1: ethernet-phy@1 {
  135. reg = <0x1>;
  136. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  137. };
  138. phy11: ethernet-phy@11 {
  139. reg = <0x11>;
  140. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  141. };
  142. phy13: ethernet-phy@13 {
  143. reg = <0x13>;
  144. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  145. };
  146. };
  147. };
  148. &gphy0 {
  149. lantiq,gphy-mode = <GPHY_MODE_GE>;
  150. };
  151. &gphy1 {
  152. lantiq,gphy-mode = <GPHY_MODE_GE>;
  153. };
  154. &gpio {
  155. pinctrl-names = "default";
  156. pinctrl-0 = <&state_default>;
  157. state_default: pinmux {
  158. mdio {
  159. lantiq,groups = "mdio";
  160. lantiq,function = "mdio";
  161. };
  162. nand {
  163. lantiq,groups = "nand cle", "nand ale",
  164. "nand rd", "nand cs1", "nand rdy";
  165. lantiq,function = "ebu";
  166. lantiq,pull = <1>;
  167. };
  168. phy-rst {
  169. lantiq,pins = "io37", "io44";
  170. lantiq,pull = <0>;
  171. lantiq,open-drain = <0>;
  172. lantiq,output = <1>;
  173. };
  174. pcie-rst {
  175. lantiq,pins = "io21";
  176. lantiq,pull = <0>;
  177. lantiq,output = <1>;
  178. };
  179. };
  180. pins_spi_default: pins_spi_default {
  181. spi_in {
  182. lantiq,groups = "spi_di";
  183. lantiq,function = "spi";
  184. };
  185. spi_out {
  186. lantiq,groups = "spi_do", "spi_clk",
  187. "spi_cs4";
  188. lantiq,function = "spi";
  189. lantiq,output = <1>;
  190. };
  191. };
  192. };
  193. &pcie0 {
  194. gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
  195. pcie@0 {
  196. reg = <0 0 0 0 0>;
  197. #interrupt-cells = <1>;
  198. #size-cells = <2>;
  199. #address-cells = <3>;
  200. device_type = "pci";
  201. wifi@0,0 {
  202. compatible = "pci0,0";
  203. reg = <0 0 0 0 0>;
  204. qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
  205. };
  206. };
  207. };
  208. &spi {
  209. status = "okay";
  210. pinctrl-names = "default";
  211. pinctrl-0 = <&pins_spi_default>;
  212. m25p80@4 {
  213. #address-cells = <1>;
  214. #size-cells = <1>;
  215. compatible = "jedec,spi-nor";
  216. reg = <4 0>;
  217. spi-max-frequency = <1000000>;
  218. urlader: partition@0 {
  219. reg = <0x0 0x20000>;
  220. label = "urlader";
  221. read-only;
  222. };
  223. partition@20000 {
  224. reg = <0x20000 0x10000>;
  225. label = "tffs (1)";
  226. read-only;
  227. };
  228. partition@30000 {
  229. reg = <0x30000 0x10000>;
  230. label = "tffs (2)";
  231. read-only;
  232. };
  233. };
  234. };
  235. &usb_phy0 {
  236. status = "okay";
  237. };
  238. &usb_phy1 {
  239. status = "okay";
  240. };
  241. &usb0 {
  242. status = "okay";
  243. vbus-supply = <&usb0_vbus>;
  244. };
  245. &usb1 {
  246. status = "okay";
  247. vbus-supply = <&usb1_vbus>;
  248. };