726-net-phy-aquantia-enable-AQR111-and-AQR111B0.patch 3.9 KB

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  1. Author: Thomas Kupper <[email protected]>
  2. Date: Wed May 24 21:14:17 2023 +0200
  3. kernel: phy: add Aquantia PHY AQR111 & AQR111B0
  4. Add the IDs for Aquantia PHY AQR111 and AQR111B0 as found in the GPL sources
  5. of the Netgear RAX120v2 firmware v1.2.8.40.
  6. This is a 5GbE chip but it reports support for 10G. Implement config_init()
  7. to set max speed to 5G.
  8. Signed-off-by: Thomas Kupper <[email protected]>
  9. --- a/drivers/net/phy/aquantia/aquantia_main.c
  10. +++ b/drivers/net/phy/aquantia/aquantia_main.c
  11. @@ -24,6 +24,8 @@
  12. #define PHY_ID_AQR405 0x03a1b4b0
  13. #define PHY_ID_AQR113C 0x31c31c12
  14. #define PHY_ID_AQR813 0x31c31cb2
  15. +#define PHY_ID_AQR111 0x03a1b610
  16. +#define PHY_ID_AQR111B0 0x03a1b612
  17. #define PHY_ID_AQR112 0x03a1b662
  18. #define PHY_ID_AQR412 0x03a1b712
  19. #define PHY_ID_AQR113 0x31c31c40
  20. @@ -674,6 +676,34 @@ static int aqcs109_config_init(struct ph
  21. return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
  22. }
  23. +static int aqr111_config_init(struct phy_device *phydev)
  24. +{
  25. + int ret;
  26. +
  27. + /* Check that the PHY interface type is compatible */
  28. + if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
  29. + phydev->interface != PHY_INTERFACE_MODE_1000BASEKX &&
  30. + phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
  31. + phydev->interface != PHY_INTERFACE_MODE_XGMII &&
  32. + phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
  33. + phydev->interface != PHY_INTERFACE_MODE_10GKR &&
  34. + phydev->interface != PHY_INTERFACE_MODE_10GBASER &&
  35. + phydev->interface != PHY_INTERFACE_MODE_XAUI &&
  36. + phydev->interface != PHY_INTERFACE_MODE_RXAUI)
  37. + return -ENODEV;
  38. +
  39. + WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
  40. + "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");
  41. +
  42. + ret = aqr107_wait_reset_complete(phydev);
  43. + if (!ret)
  44. + aqr107_chip_info(phydev);
  45. +
  46. + /* AQR111 reports supporting speed up to 10G, however only speeds up to 5G are supported. */
  47. + phy_set_max_speed(phydev, SPEED_5000);
  48. +
  49. + return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
  50. +}
  51. static void aqr107_link_change_notify(struct phy_device *phydev)
  52. {
  53. u8 fw_major, fw_minor;
  54. @@ -912,6 +942,42 @@ static struct phy_driver aqr_driver[] =
  55. .link_change_notify = aqr107_link_change_notify,
  56. },
  57. {
  58. + PHY_ID_MATCH_MODEL(PHY_ID_AQR111),
  59. + .name = "Aquantia AQR111",
  60. + .probe = aqr107_probe,
  61. + .config_init = aqr111_config_init,
  62. + .config_aneg = aqr_config_aneg,
  63. + .config_intr = aqr_config_intr,
  64. + .handle_interrupt = aqr_handle_interrupt,
  65. + .read_status = aqr107_read_status,
  66. + .get_tunable = aqr107_get_tunable,
  67. + .set_tunable = aqr107_set_tunable,
  68. + .suspend = aqr107_suspend,
  69. + .resume = aqr107_resume,
  70. + .get_sset_count = aqr107_get_sset_count,
  71. + .get_strings = aqr107_get_strings,
  72. + .get_stats = aqr107_get_stats,
  73. + .link_change_notify = aqr107_link_change_notify,
  74. +},
  75. +{
  76. + PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0),
  77. + .name = "Aquantia AQR111B0",
  78. + .probe = aqr107_probe,
  79. + .config_init = aqr111_config_init,
  80. + .config_aneg = aqr_config_aneg,
  81. + .config_intr = aqr_config_intr,
  82. + .handle_interrupt = aqr_handle_interrupt,
  83. + .read_status = aqr107_read_status,
  84. + .get_tunable = aqr107_get_tunable,
  85. + .set_tunable = aqr107_set_tunable,
  86. + .suspend = aqr107_suspend,
  87. + .resume = aqr107_resume,
  88. + .get_sset_count = aqr107_get_sset_count,
  89. + .get_strings = aqr107_get_strings,
  90. + .get_stats = aqr107_get_stats,
  91. + .link_change_notify = aqr107_link_change_notify,
  92. +},
  93. +{
  94. PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
  95. .name = "Aquantia AQR112",
  96. .probe = aqr107_probe,
  97. @@ -981,6 +1047,8 @@ static struct mdio_device_id __maybe_unu
  98. { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
  99. { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
  100. { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
  101. + { PHY_ID_MATCH_MODEL(PHY_ID_AQR111) },
  102. + { PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0) },
  103. { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
  104. { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
  105. { PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },