fallback-sprom.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * BCMA Fallback SPROM Driver
  4. *
  5. * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
  6. * Copyright (C) 2014 Jonas Gorski <[email protected]>
  7. * Copyright (C) 2008 Maxime Bizon <[email protected]>
  8. * Copyright (C) 2008 Florian Fainelli <[email protected]>
  9. */
  10. #include <linux/bcma/bcma.h>
  11. #include <linux/etherdevice.h>
  12. #include <linux/firmware.h>
  13. #include <linux/init.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mtd/mtd.h>
  16. #include <linux/of_net.h>
  17. #include <linux/of_platform.h>
  18. #include "fallback-sprom.h"
  19. #define BCMA_FBS_MAX_SIZE 468
  20. /* SPROM Extraction */
  21. #define SPOFF(offset) ((offset) / sizeof(u16))
  22. #define SPEX(_outvar, _offset, _mask, _shift) \
  23. out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
  24. #define SPEX32(_outvar, _offset, _mask, _shift) \
  25. out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
  26. in[SPOFF(_offset)]) & (_mask)) >> (_shift))
  27. #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
  28. do { \
  29. SPEX(_field[0], _offset + 0, _mask, _shift); \
  30. SPEX(_field[1], _offset + 2, _mask, _shift); \
  31. SPEX(_field[2], _offset + 4, _mask, _shift); \
  32. SPEX(_field[3], _offset + 6, _mask, _shift); \
  33. SPEX(_field[4], _offset + 8, _mask, _shift); \
  34. SPEX(_field[5], _offset + 10, _mask, _shift); \
  35. SPEX(_field[6], _offset + 12, _mask, _shift); \
  36. SPEX(_field[7], _offset + 14, _mask, _shift); \
  37. } while (0)
  38. struct bcma_fbs {
  39. struct device *dev;
  40. struct list_head list;
  41. struct ssb_sprom sprom;
  42. u32 pci_bus;
  43. u32 pci_dev;
  44. bool devid_override;
  45. };
  46. static DEFINE_SPINLOCK(bcma_fbs_lock);
  47. static struct list_head bcma_fbs_list = LIST_HEAD_INIT(bcma_fbs_list);
  48. int bcma_get_fallback_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
  49. {
  50. struct bcma_fbs *pos;
  51. u32 pci_bus, pci_dev;
  52. if (bus->hosttype != BCMA_HOSTTYPE_PCI)
  53. return -ENOENT;
  54. pci_bus = bus->host_pci->bus->number;
  55. pci_dev = PCI_SLOT(bus->host_pci->devfn);
  56. list_for_each_entry(pos, &bcma_fbs_list, list) {
  57. if (pos->pci_bus != pci_bus ||
  58. pos->pci_dev != pci_dev)
  59. continue;
  60. if (pos->devid_override)
  61. bus->host_pci->device = pos->sprom.dev_id;
  62. memcpy(out, &pos->sprom, sizeof(struct ssb_sprom));
  63. dev_info(pos->dev, "requested by [%x:%x]",
  64. pos->pci_bus, pos->pci_dev);
  65. return 0;
  66. }
  67. pr_err("unable to fill SPROM for [%x:%x]\n", pci_bus, pci_dev);
  68. return -EINVAL;
  69. }
  70. static s8 sprom_extract_antgain(const u16 *in, u16 offset, u16 mask, u16 shift)
  71. {
  72. u16 v;
  73. u8 gain;
  74. v = in[SPOFF(offset)];
  75. gain = (v & mask) >> shift;
  76. if (gain == 0xFF) {
  77. gain = 8; /* If unset use 2dBm */
  78. } else {
  79. /* Q5.2 Fractional part is stored in 0xC0 */
  80. gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
  81. }
  82. return (s8)gain;
  83. }
  84. static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
  85. {
  86. static const u16 pwr_info_offset[] = {
  87. SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
  88. SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
  89. };
  90. u16 o;
  91. int i;
  92. BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
  93. ARRAY_SIZE(out->core_pwr_info));
  94. SPEX(board_rev, SSB_SPROM8_BOARDREV, ~0, 0);
  95. SPEX(board_type, SSB_SPROM1_SPID, ~0, 0);
  96. SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G0,
  97. SSB_SPROM4_TXPID2G0_SHIFT);
  98. SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G1,
  99. SSB_SPROM4_TXPID2G1_SHIFT);
  100. SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G2,
  101. SSB_SPROM4_TXPID2G2_SHIFT);
  102. SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G3,
  103. SSB_SPROM4_TXPID2G3_SHIFT);
  104. SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL0,
  105. SSB_SPROM4_TXPID5GL0_SHIFT);
  106. SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL1,
  107. SSB_SPROM4_TXPID5GL1_SHIFT);
  108. SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL2,
  109. SSB_SPROM4_TXPID5GL2_SHIFT);
  110. SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL3,
  111. SSB_SPROM4_TXPID5GL3_SHIFT);
  112. SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G0,
  113. SSB_SPROM4_TXPID5G0_SHIFT);
  114. SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G1,
  115. SSB_SPROM4_TXPID5G1_SHIFT);
  116. SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G2,
  117. SSB_SPROM4_TXPID5G2_SHIFT);
  118. SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G3,
  119. SSB_SPROM4_TXPID5G3_SHIFT);
  120. SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH0,
  121. SSB_SPROM4_TXPID5GH0_SHIFT);
  122. SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH1,
  123. SSB_SPROM4_TXPID5GH1_SHIFT);
  124. SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH2,
  125. SSB_SPROM4_TXPID5GH2_SHIFT);
  126. SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH3,
  127. SSB_SPROM4_TXPID5GH3_SHIFT);
  128. SPEX(boardflags_lo, SSB_SPROM8_BFLLO, ~0, 0);
  129. SPEX(boardflags_hi, SSB_SPROM8_BFLHI, ~0, 0);
  130. SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0);
  131. SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0);
  132. SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
  133. SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
  134. /* Extract core's power info */
  135. for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
  136. o = pwr_info_offset[i];
  137. SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
  138. SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
  139. SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
  140. SSB_SPROM8_2G_MAXP, 0);
  141. SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
  142. SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
  143. SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
  144. SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
  145. SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
  146. SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
  147. SSB_SPROM8_5G_MAXP, 0);
  148. SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
  149. SSB_SPROM8_5GH_MAXP, 0);
  150. SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
  151. SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
  152. SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
  153. SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
  154. SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
  155. SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
  156. SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
  157. SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
  158. SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
  159. SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
  160. SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
  161. }
  162. SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TSSIPOS,
  163. SSB_SROM8_FEM_TSSIPOS_SHIFT);
  164. SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_EXTPA_GAIN,
  165. SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
  166. SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_PDET_RANGE,
  167. SSB_SROM8_FEM_PDET_RANGE_SHIFT);
  168. SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TR_ISO,
  169. SSB_SROM8_FEM_TR_ISO_SHIFT);
  170. SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_ANTSWLUT,
  171. SSB_SROM8_FEM_ANTSWLUT_SHIFT);
  172. SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TSSIPOS,
  173. SSB_SROM8_FEM_TSSIPOS_SHIFT);
  174. SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_EXTPA_GAIN,
  175. SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
  176. SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_PDET_RANGE,
  177. SSB_SROM8_FEM_PDET_RANGE_SHIFT);
  178. SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TR_ISO,
  179. SSB_SROM8_FEM_TR_ISO_SHIFT);
  180. SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT,
  181. SSB_SROM8_FEM_ANTSWLUT_SHIFT);
  182. SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
  183. SSB_SPROM8_ANTAVAIL_A_SHIFT);
  184. SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
  185. SSB_SPROM8_ANTAVAIL_BG_SHIFT);
  186. SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
  187. SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
  188. SSB_SPROM8_ITSSI_BG_SHIFT);
  189. SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
  190. SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
  191. SSB_SPROM8_ITSSI_A_SHIFT);
  192. SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
  193. SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
  194. SSB_SPROM8_MAXP_AL_SHIFT);
  195. SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
  196. SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
  197. SSB_SPROM8_GPIOA_P1_SHIFT);
  198. SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
  199. SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
  200. SSB_SPROM8_GPIOB_P3_SHIFT);
  201. SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
  202. SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
  203. SSB_SPROM8_TRI5G_SHIFT);
  204. SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
  205. SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
  206. SSB_SPROM8_TRI5GH_SHIFT);
  207. SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G,
  208. SSB_SPROM8_RXPO2G_SHIFT);
  209. SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
  210. SSB_SPROM8_RXPO5G_SHIFT);
  211. SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
  212. SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
  213. SSB_SPROM8_RSSISMC2G_SHIFT);
  214. SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
  215. SSB_SPROM8_RSSISAV2G_SHIFT);
  216. SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
  217. SSB_SPROM8_BXA2G_SHIFT);
  218. SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
  219. SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
  220. SSB_SPROM8_RSSISMC5G_SHIFT);
  221. SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
  222. SSB_SPROM8_RSSISAV5G_SHIFT);
  223. SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
  224. SSB_SPROM8_BXA5G_SHIFT);
  225. SPEX(pa0b0, SSB_SPROM8_PA0B0, ~0, 0);
  226. SPEX(pa0b1, SSB_SPROM8_PA0B1, ~0, 0);
  227. SPEX(pa0b2, SSB_SPROM8_PA0B2, ~0, 0);
  228. SPEX(pa1b0, SSB_SPROM8_PA1B0, ~0, 0);
  229. SPEX(pa1b1, SSB_SPROM8_PA1B1, ~0, 0);
  230. SPEX(pa1b2, SSB_SPROM8_PA1B2, ~0, 0);
  231. SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, ~0, 0);
  232. SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, ~0, 0);
  233. SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, ~0, 0);
  234. SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, ~0, 0);
  235. SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, ~0, 0);
  236. SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, ~0, 0);
  237. SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, ~0, 0);
  238. SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, ~0, 0);
  239. SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, ~0, 0);
  240. SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, ~0, 0);
  241. SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, ~0, 0);
  242. /* Extract the antenna gain values. */
  243. out->antenna_gain.a0 = sprom_extract_antgain(in,
  244. SSB_SPROM8_AGAIN01,
  245. SSB_SPROM8_AGAIN0,
  246. SSB_SPROM8_AGAIN0_SHIFT);
  247. out->antenna_gain.a1 = sprom_extract_antgain(in,
  248. SSB_SPROM8_AGAIN01,
  249. SSB_SPROM8_AGAIN1,
  250. SSB_SPROM8_AGAIN1_SHIFT);
  251. out->antenna_gain.a2 = sprom_extract_antgain(in,
  252. SSB_SPROM8_AGAIN23,
  253. SSB_SPROM8_AGAIN2,
  254. SSB_SPROM8_AGAIN2_SHIFT);
  255. out->antenna_gain.a3 = sprom_extract_antgain(in,
  256. SSB_SPROM8_AGAIN23,
  257. SSB_SPROM8_AGAIN3,
  258. SSB_SPROM8_AGAIN3_SHIFT);
  259. SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
  260. SSB_SPROM8_LEDDC_ON_SHIFT);
  261. SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
  262. SSB_SPROM8_LEDDC_OFF_SHIFT);
  263. SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
  264. SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
  265. SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
  266. SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
  267. SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
  268. SSB_SPROM8_TXRXC_SWITCH_SHIFT);
  269. SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
  270. SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
  271. SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
  272. SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
  273. SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
  274. SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
  275. SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
  276. SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
  277. SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
  278. SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
  279. SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
  280. SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
  281. SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
  282. SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
  283. SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
  284. SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
  285. SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
  286. SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
  287. SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
  288. SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
  289. SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
  290. SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
  291. SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
  292. SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
  293. SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
  294. SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
  295. SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
  296. SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
  297. SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
  298. SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
  299. SSB_SPROM8_THERMAL_TRESH_SHIFT);
  300. SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
  301. SSB_SPROM8_THERMAL_OFFSET_SHIFT);
  302. SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
  303. SSB_SPROM8_TEMPDELTA_PHYCAL,
  304. SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
  305. SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
  306. SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
  307. SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
  308. SSB_SPROM8_TEMPDELTA_HYSTERESIS,
  309. SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
  310. }
  311. static int sprom_extract(struct bcma_fbs *priv, const u16 *in, u16 size)
  312. {
  313. struct ssb_sprom *out = &priv->sprom;
  314. memset(out, 0, sizeof(*out));
  315. out->revision = in[size - 1] & 0x00FF;
  316. if (out->revision < 8 || out->revision > 11) {
  317. dev_warn(priv->dev,
  318. "Unsupported SPROM revision %d detected."
  319. " Will extract v8\n",
  320. out->revision);
  321. out->revision = 8;
  322. }
  323. sprom_extract_r8(out, in);
  324. return 0;
  325. }
  326. static void bcma_fbs_fixup(struct bcma_fbs *priv, u16 *sprom)
  327. {
  328. struct device_node *node = priv->dev->of_node;
  329. u32 fixups, off, val;
  330. int i = 0;
  331. if (!of_get_property(node, "brcm,sprom-fixups", &fixups))
  332. return;
  333. fixups /= sizeof(u32);
  334. dev_info(priv->dev, "patching SPROM with %u fixups...\n", fixups >> 1);
  335. while (i < fixups) {
  336. if (of_property_read_u32_index(node, "brcm,sprom-fixups",
  337. i++, &off)) {
  338. dev_err(priv->dev, "error reading fixup[%u] offset\n",
  339. i - 1);
  340. return;
  341. }
  342. if (of_property_read_u32_index(node, "brcm,sprom-fixups",
  343. i++, &val)) {
  344. dev_err(priv->dev, "error reading fixup[%u] value\n",
  345. i - 1);
  346. return;
  347. }
  348. dev_dbg(priv->dev, "fixup[%d]=0x%04x\n", off, val);
  349. sprom[off] = val;
  350. }
  351. }
  352. static bool sprom_override_devid(struct bcma_fbs *priv, struct ssb_sprom *out,
  353. const u16 *in)
  354. {
  355. SPEX(dev_id, 0x0060, 0xFFFF, 0);
  356. return !!out->dev_id;
  357. }
  358. static void bcma_fbs_set(struct bcma_fbs *priv, struct device_node *node)
  359. {
  360. struct ssb_sprom *sprom = &priv->sprom;
  361. const struct firmware *fw;
  362. const char *sprom_name;
  363. int err;
  364. if (of_property_read_string(node, "brcm,sprom", &sprom_name))
  365. sprom_name = NULL;
  366. if (sprom_name) {
  367. err = request_firmware_direct(&fw, sprom_name, priv->dev);
  368. if (err)
  369. dev_err(priv->dev, "%s load error\n", sprom_name);
  370. } else {
  371. err = -ENOENT;
  372. }
  373. if (err) {
  374. sprom->revision = 0x02;
  375. sprom->board_rev = 0x0017;
  376. sprom->country_code = 0x00;
  377. sprom->ant_available_bg = 0x03;
  378. sprom->pa0b0 = 0x15ae;
  379. sprom->pa0b1 = 0xfa85;
  380. sprom->pa0b2 = 0xfe8d;
  381. sprom->pa1b0 = 0xffff;
  382. sprom->pa1b1 = 0xffff;
  383. sprom->pa1b2 = 0xffff;
  384. sprom->gpio0 = 0xff;
  385. sprom->gpio1 = 0xff;
  386. sprom->gpio2 = 0xff;
  387. sprom->gpio3 = 0xff;
  388. sprom->maxpwr_bg = 0x4c;
  389. sprom->itssi_bg = 0x00;
  390. sprom->boardflags_lo = 0x2848;
  391. sprom->boardflags_hi = 0x0000;
  392. priv->devid_override = false;
  393. dev_warn(priv->dev, "using basic SPROM\n");
  394. } else {
  395. size_t size = min(fw->size, (size_t) BCMA_FBS_MAX_SIZE);
  396. u16 tmp_sprom[BCMA_FBS_MAX_SIZE >> 1];
  397. u32 i, j;
  398. for (i = 0, j = 0; i < size; i += 2, j++)
  399. tmp_sprom[j] = (fw->data[i] << 8) | fw->data[i + 1];
  400. release_firmware(fw);
  401. bcma_fbs_fixup(priv, tmp_sprom);
  402. sprom_extract(priv, tmp_sprom, size >> 1);
  403. priv->devid_override = sprom_override_devid(priv, sprom,
  404. tmp_sprom);
  405. }
  406. }
  407. static int bcma_fbs_probe(struct platform_device *pdev)
  408. {
  409. struct device *dev = &pdev->dev;
  410. struct device_node *node = dev->of_node;
  411. struct bcma_fbs *priv;
  412. unsigned long flags;
  413. u8 mac[ETH_ALEN];
  414. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  415. if (!priv)
  416. return -ENOMEM;
  417. priv->dev = dev;
  418. bcma_fbs_set(priv, node);
  419. of_property_read_u32(node, "pci-bus", &priv->pci_bus);
  420. of_property_read_u32(node, "pci-dev", &priv->pci_dev);
  421. of_get_mac_address(node, mac);
  422. if (is_valid_ether_addr(mac)) {
  423. dev_info(dev, "mtd mac %pM\n", mac);
  424. } else {
  425. eth_random_addr(mac);
  426. dev_info(dev, "random mac %pM\n", mac);
  427. }
  428. memcpy(priv->sprom.il0mac, mac, ETH_ALEN);
  429. memcpy(priv->sprom.et0mac, mac, ETH_ALEN);
  430. memcpy(priv->sprom.et1mac, mac, ETH_ALEN);
  431. memcpy(priv->sprom.et2mac, mac, ETH_ALEN);
  432. spin_lock_irqsave(&bcma_fbs_lock, flags);
  433. list_add(&priv->list, &bcma_fbs_list);
  434. spin_unlock_irqrestore(&bcma_fbs_lock, flags);
  435. dev_info(dev, "registered SPROM for [%x:%x]\n",
  436. priv->pci_bus, priv->pci_dev);
  437. return 0;
  438. }
  439. static const struct of_device_id bcma_fbs_of_match[] = {
  440. { .compatible = "brcm,bcma-sprom", },
  441. { /* sentinel */ }
  442. };
  443. MODULE_DEVICE_TABLE(of, bcma_fbs_of_match);
  444. static struct platform_driver bcma_fbs_driver = {
  445. .probe = bcma_fbs_probe,
  446. .driver = {
  447. .name = "bcma-sprom",
  448. .of_match_table = bcma_fbs_of_match,
  449. },
  450. };
  451. int __init bcma_fbs_register(void)
  452. {
  453. return platform_driver_register(&bcma_fbs_driver);
  454. }