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rtl930x.dtsi 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "macros.dtsi"
  3. /dts-v1/;
  4. / {
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. compatible = "realtek,rtl838x-soc";
  8. cpus {
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. frequency = <800000000>;
  12. cpu@0 {
  13. compatible = "mips,mips34Kc";
  14. reg = <0>;
  15. };
  16. };
  17. memory@0 {
  18. device_type = "memory";
  19. reg = <0x0 0x8000000>;
  20. };
  21. aliases {
  22. serial0 = &uart0;
  23. serial1 = &uart1;
  24. };
  25. chosen {
  26. bootargs = "earlycon";
  27. stdout-path = "serial0:115200n8";
  28. };
  29. cpuintc: cpuintc {
  30. compatible = "mti,cpu-interrupt-controller";
  31. #address-cells = <0>;
  32. #interrupt-cells = <1>;
  33. interrupt-controller;
  34. };
  35. lx_clk: lx_clk {
  36. compatible = "fixed-clock";
  37. #clock-cells = <0>;
  38. clock-frequency = <175000000>;
  39. };
  40. soc: soc {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. ranges = <0x0 0x18000000 0x20000>;
  45. intc: interrupt-controller@3000 {
  46. compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
  47. reg = <0x3000 0x18>, <0x3018 0x18>;
  48. interrupt-controller;
  49. #interrupt-cells = <2>;
  50. interrupt-parent = <&cpuintc>;
  51. interrupts = <2>, <3>, <4>, <5>, <6>, <7>;
  52. };
  53. snand: spi@1a400 {
  54. compatible = "realtek,rtl9301-snand";
  55. reg = <0x1a400 0x44>;
  56. interrupt-parent = <&intc>;
  57. interrupts = <19 2>;
  58. clocks = <&lx_clk>;
  59. #address-cells = <1>;
  60. #size-cells = <0>;
  61. status = "disabled";
  62. };
  63. spi0: spi@1200 {
  64. compatible = "realtek,rtl8380-spi";
  65. reg = <0x1200 0x100>;
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. };
  69. timer0: timer@3200 {
  70. compatible = "realtek,rtl930x-timer", "realtek,otto-timer";
  71. reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
  72. <0x3230 0x10>, <0x3240 0x10>;
  73. interrupt-parent = <&intc>;
  74. interrupts = <7 4>, <8 4>, <9 4>, <10 4>, <11 4>;
  75. clocks = <&lx_clk>;
  76. };
  77. uart0: uart@2000 {
  78. compatible = "ns16550a";
  79. reg = <0x2000 0x100>;
  80. clocks = <&lx_clk>;
  81. interrupt-parent = <&intc>;
  82. interrupts = <30 1>;
  83. reg-io-width = <1>;
  84. reg-shift = <2>;
  85. fifo-size = <1>;
  86. no-loopback-test;
  87. };
  88. uart1: uart@2100 {
  89. compatible = "ns16550a";
  90. reg = <0x2100 0x100>;
  91. clocks = <&lx_clk>;
  92. interrupt-parent = <&intc>;
  93. interrupts = <31 0>;
  94. reg-io-width = <1>;
  95. reg-shift = <2>;
  96. fifo-size = <1>;
  97. no-loopback-test;
  98. status = "disabled";
  99. };
  100. watchdog0: watchdog@3260 {
  101. compatible = "realtek,rtl9300-wdt";
  102. reg = <0x3260 0xc>;
  103. realtek,reset-mode = "soc";
  104. clocks = <&lx_clk>;
  105. timeout-sec = <30>;
  106. interrupt-parent = <&intc>;
  107. interrupt-names = "phase1", "phase2";
  108. interrupts = <5 4>, <6 4>;
  109. };
  110. gpio0: gpio-controller@3300 {
  111. compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";
  112. reg = <0x3300 0x1c>, <0x3338 0x8>;
  113. gpio-controller;
  114. #gpio-cells = <2>;
  115. ngpios = <24>;
  116. interrupt-controller;
  117. #interrupt-cells = <2>;
  118. interrupt-parent = <&intc>;
  119. interrupts = <13 1>;
  120. };
  121. };
  122. switchcore@1b000000 {
  123. compatible = "syscon", "simple-mfd";
  124. reg = <0x1b000000 0x10000>;
  125. i2c_mst1: i2c@36c {
  126. compatible = "realtek,rtl9301-i2c";
  127. reg = <0x36c 0x18>;
  128. #address-cells = <1>;
  129. #size-cells = <0>;
  130. status = "disabled";
  131. };
  132. i2c_mst2: i2c@388 {
  133. compatible = "realtek,rtl9301-i2c";
  134. reg = <0x388 0x18>;
  135. #address-cells = <1>;
  136. #size-cells = <0>;
  137. status = "disabled";
  138. };
  139. mdio_aux: mdio-aux {
  140. compatible = "realtek,rtl9300-aux-mdio";
  141. #address-cells = <1>;
  142. #size-cells = <0>;
  143. pinctrl-0 = <&pinmux_gpio_mdio_en>;
  144. pinctrl-names = "default";
  145. status = "disabled";
  146. };
  147. soc_thermal: thermal {
  148. compatible = "realtek,rtl9300-thermal";
  149. #thermal-sensor-cells = <0>;
  150. };
  151. };
  152. pinmux@1b00c600 {
  153. compatible = "pinctrl-single";
  154. reg = <0x1b00c600 0x4>;
  155. pinctrl-single,bit-per-mux;
  156. pinctrl-single,register-width = <32>;
  157. pinctrl-single,function-mask = <0x1>;
  158. #pinctrl-cells = <2>;
  159. pinmux_gpio_mdio_en: gpio-mdio-en {
  160. pinctrl-single,bits = <0x0 0x100 0x100>;
  161. };
  162. };
  163. pinmux_led: pinmux@1b00cc00 {
  164. compatible = "pinctrl-single";
  165. reg = <0x1b00cc00 0x4>;
  166. pinctrl-single,bit-per-mux;
  167. pinctrl-single,register-width = <32>;
  168. pinctrl-single,function-mask = <0x1>;
  169. #pinctrl-cells = <2>;
  170. /* enable GPIO 0 */
  171. pinmux_disable_sys_led: disable_sys_led {
  172. pinctrl-single,bits = <0x0 0x0 0x1000>;
  173. };
  174. };
  175. ethernet0: ethernet@1b00a300 {
  176. compatible = "realtek,rtl838x-eth";
  177. reg = <0x1b00a300 0x100>;
  178. interrupt-parent = <&intc>;
  179. interrupts = <24 3>;
  180. phy-mode = "internal";
  181. fixed-link {
  182. speed = <1000>;
  183. full-duplex;
  184. };
  185. };
  186. switch0: switch@1b000000 {
  187. compatible = "realtek,rtl83xx-switch";
  188. status = "okay";
  189. interrupt-parent = <&intc>;
  190. interrupts = <23 2>;
  191. };
  192. thermal_zones: thermal-zones {
  193. cpu-thermal {
  194. polling-delay-passive = <1000>;
  195. polling-delay = <1000>;
  196. coefficients = <1000 0>;
  197. thermal-sensors = <&soc_thermal>;
  198. trips {
  199. critical {
  200. temperature = <105000>;
  201. hysteresis = <2000>;
  202. type = "critical";
  203. };
  204. };
  205. };
  206. };
  207. };