openwrt/target/linux/starfive/patches-6.12/0028-RISC-V-Support-CPUID-for-risc-v-in-perf.patch

From 81ab7f42a1153d6d93b3d429ae0c779e97b0d3d6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jo=C3=A3o=20M=C3=A1rio=20Domingos?=
 <[email protected]>
Date: Tue, 16 Nov 2021 15:48:10 +0000
Subject: [PATCH 28/55] RISC-V: Support CPUID for risc-v in perf
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This patch creates the header.c file for the risc-v architecture and introduces support for
PMU identification through sysfs.
It is now possible to configure pmu-events in risc-v.

Depends on patch [1], that introduces the id sysfs file.

Signed-off-by: João Mário Domingos <[email protected]>
Signed-off-by: minda.chen <[email protected]>
---
 drivers/perf/riscv_pmu.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

--- a/drivers/perf/riscv_pmu.c
+++ b/drivers/perf/riscv_pmu.c
@@ -18,6 +18,23 @@
 
 #include <asm/sbi.h>
 
+PMU_FORMAT_ATTR(event, "config:0-63");
+
+static struct attribute *riscv_arch_formats_attr[] = {
+	&format_attr_event.attr,
+	NULL,
+};
+
+static struct attribute_group riscv_pmu_format_group = {
+	.name = "format",
+	.attrs = riscv_arch_formats_attr,
+};
+
+static const struct attribute_group *riscv_pmu_attr_groups[] = {
+	&riscv_pmu_format_group,
+	NULL,
+};
+
 static bool riscv_perf_user_access(struct perf_event *event)
 {
 	return ((event->attr.type == PERF_TYPE_HARDWARE) ||
@@ -407,6 +424,7 @@ struct riscv_pmu *riscv_pmu_alloc(void)
 		cpuc->snapshot_addr = NULL;
 	}
 	pmu->pmu = (struct pmu) {
+		.attr_groups	= riscv_pmu_attr_groups,
 		.event_init	= riscv_pmu_event_init,
 		.event_mapped	= riscv_pmu_event_mapped,
 		.event_unmapped	= riscv_pmu_event_unmapped,