ipq5018-ax6000.dts 10 KB

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  1. /dts-v1/;
  2. #include "ipq5018.dtsi"
  3. #include "ipq5018-ess.dtsi"
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. #include <dt-bindings/leds/common.h>
  7. / {
  8. model = "Xiaomi AX6000";
  9. compatible = "xiaomi,ax6000", "qcom,ipq5018";
  10. aliases {
  11. label-mac-device = &dp1;
  12. led-boot = &led_system_blue;
  13. led-failsafe = &led_system_yellow;
  14. led-running = &led_system_blue;
  15. led-upgrade = &led_system_yellow;
  16. serial0 = &blsp1_uart1;
  17. };
  18. chosen {
  19. /* Xiaomi's U-boot sets bootargs to:
  20. * ubi.mtd=rootfs_1 root=mtd:ubi_rootfs rootfstype=squashfs rootwait uart_en=1
  21. * so we need to override and set ubi.mtd=rootfs
  22. */
  23. bootargs-append = " ubi.mtd=rootfs root=/dev/ubiblock0_0 coherent_pool=2M";
  24. stdout-path = "serial0:115200n8";
  25. };
  26. keys {
  27. compatible = "gpio-keys";
  28. pinctrl-0 = <&button_pins>;
  29. pinctrl-names = "default";
  30. reset-button {
  31. label = "reset";
  32. gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
  33. linux,code = <KEY_RESTART>;
  34. };
  35. };
  36. leds {
  37. compatible = "gpio-leds";
  38. pinctrl-0 = <&leds_pins>;
  39. pinctrl-names = "default";
  40. led_wlan_green: wlan-green {
  41. color = <LED_COLOR_ID_GREEN>;
  42. function = LED_FUNCTION_WLAN;
  43. gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
  44. };
  45. led_system_blue: system-blue {
  46. color = <LED_COLOR_ID_BLUE>;
  47. function = LED_FUNCTION_POWER;
  48. gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
  49. };
  50. led_system_yellow: system-yellow {
  51. color = <LED_COLOR_ID_YELLOW>;
  52. function = LED_FUNCTION_POWER;
  53. gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
  54. };
  55. led_net_blue: net-blue {
  56. color = <LED_COLOR_ID_BLUE>;
  57. function = LED_FUNCTION_WAN_ONLINE;
  58. gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
  59. };
  60. led_net_yellow: net-yellow {
  61. color = <LED_COLOR_ID_YELLOW>;
  62. function = LED_FUNCTION_WAN;
  63. gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
  64. };
  65. led_phy_green: phy-green {
  66. color = <LED_COLOR_ID_GREEN>;
  67. function = LED_FUNCTION_LAN;
  68. gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
  69. };
  70. };
  71. };
  72. &sleep_clk {
  73. clock-frequency = <32000>;
  74. };
  75. &xo_board_clk {
  76. clock-div = <4>;
  77. clock-mult = <1>;
  78. };
  79. &blsp1_uart1 {
  80. status = "okay";
  81. pinctrl-0 = <&serial_0_pins>;
  82. pinctrl-names = "default";
  83. };
  84. &crypto {
  85. status = "okay";
  86. };
  87. &cryptobam {
  88. status = "okay";
  89. };
  90. &prng {
  91. status = "okay";
  92. };
  93. &qfprom {
  94. status = "okay";
  95. };
  96. &qpic_bam {
  97. status = "okay";
  98. };
  99. &qpic_nand {
  100. pinctrl-0 = <&qpic_pins>;
  101. pinctrl-names = "default";
  102. status = "okay";
  103. nand@0 {
  104. compatible = "spi-nand";
  105. reg = <0>;
  106. nand-ecc-engine = <&qpic_nand>;
  107. nand-bus-width = <8>;
  108. partitions {
  109. compatible = "fixed-partitions";
  110. #address-cells = <1>;
  111. #size-cells = <1>;
  112. partition@0 {
  113. label = "0:sbl1";
  114. reg = <0x00000000 0x80000>;
  115. read-only;
  116. };
  117. partition@80000 {
  118. label = "0:mibib";
  119. reg = <0x00080000 0x80000>;
  120. read-only;
  121. };
  122. partition@100000 {
  123. label = "0:bootconfig";
  124. reg = <0x00100000 0x40000>;
  125. read-only;
  126. };
  127. partition@140000 {
  128. label = "0:bootconfig1";
  129. reg = <0x00140000 0x40000>;
  130. read-only;
  131. };
  132. partition@180000 {
  133. label = "0:qsee";
  134. reg = <0x00180000 0x100000>;
  135. read-only;
  136. };
  137. partition@280000 {
  138. label = "0:qsee_1";
  139. reg = <0x00280000 0x100000>;
  140. read-only;
  141. };
  142. partition@380000 {
  143. label = "0:devcfg";
  144. reg = <0x00380000 0x40000>;
  145. read-only;
  146. };
  147. partition@3c0000 {
  148. label = "0:devcfg_1";
  149. reg = <0x003c0000 0x40000>;
  150. read-only;
  151. };
  152. partition@400000 {
  153. label = "0:cdt";
  154. reg = <0x00400000 0x40000>;
  155. read-only;
  156. };
  157. partition@440000 {
  158. label = "0:cdt_1`";
  159. reg = <0x00440000 0x40000>;
  160. read-only;
  161. };
  162. partition@480000 {
  163. label = "0:appsblenv";
  164. reg = <0x00480000 0x80000>;
  165. };
  166. partition@500000 {
  167. label = "0:appsbl";
  168. reg = <0x00500000 0x140000>;
  169. read-only;
  170. };
  171. partition@640000 {
  172. label = "0:appsbl_1";
  173. reg = <0x00640000 0x140000>;
  174. read-only;
  175. };
  176. partition@780000 {
  177. label = "0:art";
  178. reg = <0x00780000 0x100000>;
  179. read-only;
  180. nvmem-layout {
  181. compatible = "fixed-layout";
  182. #address-cells = <1>;
  183. #size-cells = <1>;
  184. mac_addr_dp1: macaddr@0 {
  185. reg = <0x0 0x6>;
  186. };
  187. mac_addr_dp2: macaddr@6 {
  188. reg = <0x6 0x6>;
  189. };
  190. caldata_qca9889: caldata@4d000 {
  191. reg = <0x4d000 0x844>;
  192. };
  193. };
  194. };
  195. partition@880000 {
  196. label = "0:training";
  197. reg = <0x00880000 0x80000>;
  198. read-only;
  199. };
  200. partition@900000 {
  201. label = "bdata";
  202. reg = <0x00900000 0x80000>;
  203. };
  204. partition@980000 {
  205. label = "crash";
  206. reg = <0x00980000 0x80000>;
  207. };
  208. partition@a00000 {
  209. label = "crash_syslog";
  210. reg = <0x00a00000 0x80000>;
  211. };
  212. partition@a80000 {
  213. label = "ubi_kernel";
  214. reg = <0x00a80000 0x2400000>;
  215. };
  216. partition@2e80000 {
  217. label = "rootfs";
  218. reg = <0x02e80000 0x5180000>;
  219. };
  220. };
  221. };
  222. };
  223. /*
  224. * =================================================================
  225. * _______________________ _______________________
  226. * | IPQ5018 | | QCA8337 |
  227. * | +------+ +--------+ | | +--------+ +------+ |
  228. * | | MAC0 |---| GE Phy |-+--- MDI ---+ | Phy3 |---| MAC4 | |
  229. * | +------+ +--------+ | | +--------+ +------+ |
  230. * | | |_______________________|
  231. * | | _______________________
  232. * | | | QCA8081 |
  233. * | +------+ +--------+ | | +-------------------+ |
  234. * | | MAC1 |---| Uniphy |-+-- SGMII+--+ | Phy | |
  235. * | +------+ +--------+ | | +-------------------+ |
  236. * |_______________________| |_______________________|
  237. *
  238. * =================================================================
  239. */
  240. &switch {
  241. status = "okay";
  242. switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
  243. qcom,port_phyinfo {
  244. // MAC0 -> GE Phy --- MDI --- QCA8337 Switch
  245. port@1 {
  246. port_id = <1>;
  247. mdiobus = <&mdio0>;
  248. phy_address = <7>;
  249. phy_dac = <0x10 0x10>;
  250. };
  251. // MAC1 -> Uniphy --- SGMII --- QCA8081
  252. port@2 {
  253. port_id = <2>;
  254. mdiobus = <&mdio1>;
  255. phy_address = <8>;
  256. port_mac_sel = "QGMAC_PORT";
  257. };
  258. };
  259. };
  260. // MAC0 -> GE Phy
  261. &dp1 {
  262. status = "okay";
  263. nvmem-cells = <&mac_addr_dp1 0>;
  264. nvmem-cell-names = "mac-address";
  265. };
  266. // MAC1 ---SGMII---> QCA8081
  267. &dp2 {
  268. status = "okay";
  269. label = "wan";
  270. phy-handle = <&qca8081>;
  271. nvmem-cells = <&mac_addr_dp2 0>;
  272. nvmem-cell-names = "mac-address";
  273. };
  274. &mdio0 {
  275. status = "okay";
  276. };
  277. // IPQ5018 GE Phy -> QCA8337 PHY0
  278. &ge_phy {
  279. qcom,dac-preset-short-cable;
  280. };
  281. &mdio1 {
  282. status = "okay";
  283. pinctrl-0 = <&mdio1_pins>;
  284. pinctrl-names = "default";
  285. reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
  286. // QCA8337 Phy0 -> LAN1
  287. qca8337_0: ethernet-phy@0 {
  288. reg = <0>;
  289. };
  290. // QCA8337 Phy1 -> LAN2
  291. qca8337_1: ethernet-phy@1 {
  292. reg = <1>;
  293. };
  294. // QCA8337 Phy2 -> LAN3
  295. qca8337_2: ethernet-phy@2 {
  296. reg = <2>;
  297. };
  298. // QCA8337 Phy3 -> IPQ5018 GE Phy
  299. qca8337_3: ethernet-phy@3 {
  300. reg = <3>;
  301. };
  302. // QCA8081 Phy -> WAN
  303. qca8081: ethernet-phy@8 {
  304. compatible = "ethernet-phy-id004d.d101";
  305. reg = <8>;
  306. leds {
  307. #address-cells = <1>;
  308. #size-cells = <0>;
  309. led@0 {
  310. reg = <0>;
  311. color = <LED_COLOR_ID_GREEN>;
  312. function = LED_FUNCTION_WAN;
  313. default-state = "keep";
  314. };
  315. };
  316. };
  317. // QCA8337 switch
  318. ethernet-switch@11 {
  319. compatible = "qca,qca8337";
  320. reg = <17>;
  321. ports {
  322. #address-cells = <1>;
  323. #size-cells = <0>;
  324. port@1 {
  325. reg = <1>;
  326. label = "lan1";
  327. phy-handle = <&qca8337_0>;
  328. leds {
  329. #address-cells = <1>;
  330. #size-cells = <0>;
  331. led@0 {
  332. reg = <0>;
  333. color = <LED_COLOR_ID_GREEN>;
  334. function = LED_FUNCTION_LAN;
  335. default-state = "keep";
  336. };
  337. };
  338. };
  339. port@2 {
  340. reg = <2>;
  341. label = "lan2";
  342. phy-handle = <&qca8337_1>;
  343. leds {
  344. #address-cells = <1>;
  345. #size-cells = <0>;
  346. led@0 {
  347. reg = <0>;
  348. color = <LED_COLOR_ID_GREEN>;
  349. function = LED_FUNCTION_LAN;
  350. default-state = "keep";
  351. };
  352. };
  353. };
  354. port@3 {
  355. reg = <3>;
  356. label = "lan3";
  357. phy-handle = <&qca8337_2>;
  358. leds {
  359. #address-cells = <1>;
  360. #size-cells = <0>;
  361. led@0 {
  362. reg = <0>;
  363. color = <LED_COLOR_ID_GREEN>;
  364. function = LED_FUNCTION_LAN;
  365. default-state = "keep";
  366. };
  367. };
  368. };
  369. port@4 {
  370. reg = <4>;
  371. phy-handle = <&qca8337_3>;
  372. phy-mode = "gmii";
  373. ethernet = <&dp1>;
  374. };
  375. };
  376. };
  377. };
  378. &tlmm {
  379. button_pins: button-state {
  380. pins = "gpio38";
  381. function = "gpio";
  382. drive-strength = <8>;
  383. bias-pull-up;
  384. };
  385. leds_pins: leds-state {
  386. pins = "gpio23", "gpio24", "gpio25",
  387. "gpio26", "gpio27", "gpio28";
  388. function = "gpio";
  389. drive-strength = <8>;
  390. bias-pull-down;
  391. };
  392. mdio1_pins: mdio-state {
  393. mdc-pins {
  394. pins = "gpio36";
  395. function = "mdc";
  396. drive-strength = <8>;
  397. bias-pull-up;
  398. };
  399. mdio-pins {
  400. pins = "gpio37";
  401. function = "mdio";
  402. drive-strength = <8>;
  403. bias-pull-up;
  404. };
  405. };
  406. qpic_pins: qpic-state {
  407. clock-pins {
  408. pins = "gpio9";
  409. function = "qspi_clk";
  410. drive-strength = <8>;
  411. bias-disable;
  412. };
  413. cs-pins {
  414. pins = "gpio8";
  415. function = "qspi_cs";
  416. drive-strength = <8>;
  417. bias-disable;
  418. };
  419. data-pins {
  420. pins = "gpio4", "gpio5", "gpio6", "gpio7";
  421. function = "qspi_data";
  422. drive-strength = <8>;
  423. bias-disable;
  424. };
  425. };
  426. serial_0_pins: uart0-state {
  427. pins = "gpio20", "gpio21";
  428. function = "blsp0_uart0";
  429. bias-disable;
  430. };
  431. };
  432. &pcie0_phy {
  433. status = "okay";
  434. };
  435. &pcie0 {
  436. status = "okay";
  437. perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
  438. pcie@0 {
  439. wifi@0,0 {
  440. status = "okay";
  441. /* QCN9074: ath11k lacks DT compatible for PCI cards */
  442. compatible = "pci17cb,1104";
  443. reg = <0x00010000 0 0 0 0>;
  444. qcom,ath11k-calibration-variant = "Xiaomi-AX6000";
  445. };
  446. };
  447. };
  448. &pcie1_phy {
  449. status = "okay";
  450. };
  451. &pcie1 {
  452. /*
  453. * although the pcie1 phy probes successfully, the controller is unable
  454. * to bring it up. So let's disable it until a solution is found.
  455. */
  456. status = "disabled";
  457. perst-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  458. pcie@0 {
  459. wifi@0,0 {
  460. status = "okay";
  461. compatible = "qcom,ath10k";
  462. reg = <0x00010000 0 0 0 0>;
  463. qcom,ath10k-calibration-variant = "Xiaomi-AX6000";
  464. nvmem-cell-names = "calibration";
  465. nvmem-cells = <&caldata_qca9889>;
  466. };
  467. };
  468. };
  469. &q6v5_wcss {
  470. firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt",
  471. "ath11k/IPQ5018/hw1.0/m3_fw.mdt";
  472. };
  473. &wifi {
  474. status = "okay";
  475. qcom,rproc = <&q6v5_wcss>;
  476. qcom,ath11k-calibration-variant = "Xiaomi-AX6000";
  477. qcom,ath11k-fw-memory-mode = <1>;
  478. };