openwrt/target/linux/qualcommax/dts/ipq6000-glinet.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "ipq6018-512m.dtsi"
#include "ipq6018-ess.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	aliases {
		led-boot = &led_run;
		led-failsafe = &led_run;
		led-running = &led_run;
		led-upgrade = &led_run;
		serial0 = &blsp1_uart3;
		serial1 = &blsp1_uart4;
		serial2 = &blsp1_uart5;
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs-append = " root=/dev/ubiblock0_1";
	};

	keys {
		compatible = "gpio-keys";

		switch {
			label = "switch";
			linux,code = <BTN_0>;
			linux,input-type = <EV_SW>;
			gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
		};

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_run: run {
			label = "blue:run";
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
		};

		system {
			label = "white:system";
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
		};
	};

	reg_usb_vbus: regulator-usb-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-boot-on;
	};
};

&tlmm {
	mdio_pins: mdio-pins {
		mdc {
			pins = "gpio64";
			function = "mdc";
			drive-strength = <8>;
			bias-pull-up;
		};

		mdio {
			pins = "gpio65";
			function = "mdio";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	tluart_pins: tluart-pins {
		mux {
			pins = "gpio75", "gpio76";
			function = "blsp3_uart";
			drive-strength = <8>;
			bias-disable;
		};
	};

	hsuart_pins: hsuart-pins {
		mux {
			pins = "gpio57", "gpio58";
			function = "blsp4_uart";
			drive-strength = <8>;
			bias-disable;
		};
	};
};

&blsp1_uart3 {
	pinctrl-0 = <&serial_3_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&blsp1_uart4 {
	pinctrl-0 = <&tluart_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&blsp1_uart5 {
	pinctrl-0 = <&hsuart_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&qpic_bam {
	status = "okay";
};

&qpic_nand {
	status = "okay";

	nand@0 {
		reg = <0>;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;
		nand-bus-width = <8>;
		#address-cells = <1>;
		#size-cells = <1>;

		partitions: partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:sbl1";
				reg = <0x0000000 0x0180000>;
				read-only;
			};

			partition@180000 {
				label = "0:mibib";
				reg = <0x0180000 0x0100000>;
				read-only;
			};

			partition@280000 {
				label = "0:qsee";
				reg = <0x0280000 0x0380000>;
				read-only;
			};

			partition@600000 {
				label = "0:devcfg";
				reg = <0x0600000 0x0080000>;
				read-only;
			};

			partition@680000 {
				label = "0:rpm";
				reg = <0x0680000 0x0080000>;
				read-only;
			};

			partition@700000 {
				label = "0:cdt";
				reg = <0x0700000 0x0080000>;
				read-only;
			};

			partition@780000 {
				label = "0:appsblenv";
				reg = <0x0780000 0x0080000>;
			};

			partition@800000 {
				label = "0:appsbl";
				reg = <0x0800000 0x0180000>;
				read-only;
			};

			partition@980000 {
				label = "0:art";
				reg = <0x0980000 0x0080000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_wan: macaddr@0 {
						reg = <0x0 0x6>;
					};

					macaddr_lan: macaddr@6 {
						reg = <0x6 0x6>;
					};
				};
			};

			/* rootfs defined in variant dts */

			partition@7d00000 {
				label = "0:ethphyfw";
				reg = <0x7d00000 0x0080000>;
				read-only;
			};
		};
	};
};

&qusb_phy_0 {
	vdd-supply = <&reg_usb_vbus>;
	status = "okay";
};

&ssphy_0 {
	status = "okay";
};

&usb3 {
	status = "okay";
};

&rpm {
	status = "disabled";
};

&mdio {
	status = "okay";

	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
	reset-gpios = <&tlmm 74 GPIO_ACTIVE_LOW>;

	ethernet-phy-package@0 {
		compatible = "qcom,qca8075-package";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;

		qca8075_0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
		};

		qca8075_1: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
		};

		qca8075_2: ethernet-phy@2 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <2>;
		};

		qca8075_3: ethernet-phy@3 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <3>;
		};

		qca8075_4: ethernet-phy@4 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <4>;
		};
	};
};

&switch {
	status = "okay";

	switch_mac_mode = <MAC_MODE_PSGMII>;

	qcom,port_phyinfo {
		port@1 {
			port_id = <1>;
			phy_address = <0>;
		};
		port@2 {
			port_id = <2>;
			phy_address = <1>;
		};
		port@3 {
			port_id = <3>;
			phy_address = <2>;
		};
		port@4 {
			port_id = <4>;
			phy_address = <3>;
		};
		port@5 {
			port_id = <5>;
			phy_address = <4>;
		};
	};
};

&edma {
	status = "okay";
};

&wifi {
	status = "okay";

	qcom,ath11k-fw-memory-mode = <1>;
};