ipq6010-xe3-4.dts 7.7 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+)
  2. /dts-v1/;
  3. #include "ipq6018.dtsi"
  4. #include "ipq6018-ess.dtsi"
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/input/input.h>
  7. #include <dt-bindings/leds/common.h>
  8. / {
  9. /* Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C3 */
  10. model = "Cambium Networks XE3-4";
  11. compatible = "cambiumnetworks,xe3-4", "qcom,ipq6018-cp01", "qcom,ipq6018";
  12. aliases {
  13. serial0 = &blsp1_uart3;
  14. ethernet0 = &dp5;
  15. ethernet1 = &dp4;
  16. label-mac-device = &dp5;
  17. led-boot = &led_status_amber;
  18. led-failsafe = &led_status_amber;
  19. led-running = &led_status_white;
  20. led-upgrade = &led_status_amber;
  21. };
  22. chosen {
  23. stdout-path = "serial0:115200n8";
  24. bootargs-append = " root=/dev/ubiblock0_1";
  25. };
  26. keys {
  27. compatible = "gpio-keys";
  28. reset {
  29. label = "reset";
  30. gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
  31. linux,code = <KEY_RESTART>;
  32. };
  33. };
  34. leds {
  35. compatible = "gpio-leds";
  36. pinctrl-0 = <&led_pins>;
  37. pinctrl-names = "default";
  38. led_status_white: status-white {
  39. color = <LED_COLOR_ID_WHITE>;
  40. function = LED_FUNCTION_STATUS;
  41. gpios = <&tlmm 56 GPIO_ACTIVE_LOW>;
  42. };
  43. led_status_amber: status-amber {
  44. color = <LED_COLOR_ID_AMBER>;
  45. function = LED_FUNCTION_STATUS;
  46. gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
  47. };
  48. };
  49. reg_sd_vmmc: regulator-sdcard-vmmc {
  50. compatible = "regulator-fixed";
  51. regulator-name = "sdcard-vmmc";
  52. regulator-min-microvolt = <2950000>;
  53. regulator-max-microvolt = <2950000>;
  54. startup-delay-us = <200>;
  55. gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
  56. enable-active-high;
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&sd_vmmc_en_default>;
  59. };
  60. };
  61. &blsp1_uart3 {
  62. pinctrl-0 = <&serial_3_pins>;
  63. pinctrl-names = "default";
  64. status = "okay";
  65. };
  66. &blsp1_i2c3 {
  67. pinctrl-0 = <&i2c_1_pins>;
  68. pinctrl-names = "default";
  69. status = "okay";
  70. };
  71. &rpm {
  72. status = "disabled";
  73. };
  74. &tlmm {
  75. /* TZ has exclusive control over GPIO20 */
  76. gpio-reserved-ranges = <20 1>;
  77. mdio_pins: mdio-pins {
  78. mdc {
  79. pins = "gpio64";
  80. function = "mdc";
  81. drive-strength = <8>;
  82. bias-pull-up;
  83. };
  84. mdio {
  85. pins = "gpio65";
  86. function = "mdio";
  87. drive-strength = <8>;
  88. bias-pull-up;
  89. };
  90. };
  91. i2c_1_pins: i2c-1-state {
  92. pins = "gpio42", "gpio43";
  93. function = "blsp2_i2c";
  94. drive-strength = <8>;
  95. };
  96. spi_0_pins: spi-0-state {
  97. pins = "gpio38", "gpio39", "gpio40", "gpio41";
  98. function = "blsp0_spi";
  99. drive-strength = <8>;
  100. bias-pull-down;
  101. };
  102. led_pins: led_pins {
  103. leds {
  104. pins = "gpio35", "gpio37", "gpio50";
  105. function = "gpio";
  106. drive-strength = <8>;
  107. bias-pull-down;
  108. };
  109. };
  110. sd_vmmc_en_default: sd-vmmc-en-default-state {
  111. pins = "gpio66";
  112. function = "gpio";
  113. drive-strength = <8>;
  114. bias-pull-down;
  115. };
  116. sd_pins: sd-state {
  117. pins = "gpio62";
  118. function = "gpio";
  119. drive-strength = <8>;
  120. bias-pull-up;
  121. };
  122. };
  123. &pcie_phy {
  124. status = "okay";
  125. };
  126. &pcie0 {
  127. status = "okay";
  128. perst-gpios = <&tlmm 60 GPIO_ACTIVE_LOW>;
  129. pcie@0 {
  130. wifi@0,0 {
  131. status = "okay";
  132. /* ath11k has no DT compatible for PCI cards */
  133. compatible = "pci17cb,1104";
  134. reg = <0x00010000 0 0 0 0>;
  135. qcom,ath11k-fw-memory-mode = <0>;
  136. qcom,ath11k-calibration-variant = "CambiumNetworks-XE34";
  137. };
  138. };
  139. };
  140. &sdhc {
  141. pinctrl-0 = <&sd_pins>;
  142. pinctrl-names = "default";
  143. status = "okay";
  144. cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
  145. vqmmc-supply = <&reg_sd_vmmc>;
  146. bus-width = <4>;
  147. };
  148. &edma {
  149. status = "okay";
  150. };
  151. &switch {
  152. status = "okay";
  153. switch_lan_bmp = <(ESS_PORT4 | ESS_PORT5)>;
  154. switch_mac_mode = <MAC_MODE_PSGMII>;
  155. switch_mac_mode2 = <MAC_MODE_SGMII_PLUS>;
  156. qcom,port_phyinfo {
  157. port@4 {
  158. port_id = <4>;
  159. phy_address = <3>;
  160. };
  161. port@5 {
  162. port_id = <5>;
  163. phy_address = <24>;
  164. port_mac_sel = "QGMAC_PORT";
  165. };
  166. };
  167. };
  168. &mdio {
  169. status = "okay";
  170. pinctrl-0 = <&mdio_pins>;
  171. pinctrl-names = "default";
  172. reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
  173. reset-delay-us = <10000>;
  174. reset-post-delay-us = <50000>;
  175. ethernet-phy-package@0 {
  176. #address-cells = <1>;
  177. #size-cells = <0>;
  178. compatible = "qcom,qca8075-package";
  179. reg = <0>;
  180. qcom,package-mode = "psgmii";
  181. qca8072: ethernet-phy@3 {
  182. compatible = "ethernet-phy-ieee802.3-c22";
  183. reg = <3>;
  184. };
  185. };
  186. qca8081: ethernet-phy@24 {
  187. compatible = "ethernet-phy-id004d.d101";
  188. reg = <24>;
  189. reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
  190. reset-assert-us = <10000>;
  191. reset-deassert-us = <50000>;
  192. };
  193. };
  194. &dp4 {
  195. status = "okay";
  196. phy-handle = <&qca8072>;
  197. nvmem-cell-names = "mac-address";
  198. nvmem-cells = <&eth1addr 0>;
  199. label = "lan2";
  200. };
  201. &dp5 {
  202. status = "okay";
  203. phy-mode = "sgmii";
  204. phy-handle = <&qca8081>;
  205. nvmem-cell-names = "mac-address";
  206. nvmem-cells = <&ethaddr 0>;
  207. label = "lan1";
  208. };
  209. &blsp1_spi1 {
  210. pinctrl-0 = <&spi_0_pins>;
  211. pinctrl-names = "default";
  212. status = "okay";
  213. flash@0 {
  214. reg = <0>;
  215. /*
  216. * U-boot looks for "n25q128a11" node,
  217. * if we don't have it, it will spit out the following warning:
  218. * "ipq: fdt fixup unable to find compatible node".
  219. */
  220. linux,modalias = "m25p80", "mx30uf2g18ac", "n25q128a11";
  221. compatible = "micron,n25q128a11", "jedec,spi-nor";
  222. spi-max-frequency = <50000000>;
  223. partitions {
  224. compatible = "fixed-partitions";
  225. #address-cells = <1>;
  226. #size-cells = <1>;
  227. partition@0 {
  228. label = "0:SBL1";
  229. reg = <0x0 0xc0000>;
  230. read-only;
  231. };
  232. partition@c0000 {
  233. label = "0:MIBIB";
  234. reg = <0xc0000 0x10000>;
  235. read-only;
  236. };
  237. partition@d0000 {
  238. label = "0:BOOTCONFIG";
  239. reg = <0xd0000 0x20000>;
  240. read-only;
  241. };
  242. partition@f0000 {
  243. label = "0:BOOTCONFIG1";
  244. reg = <0xf0000 0x20000>;
  245. read-only;
  246. };
  247. partition@110000 {
  248. label = "0:QSEE";
  249. reg = <0x110000 0x1a0000>;
  250. read-only;
  251. };
  252. partition@2b0000 {
  253. label = "0:QSEE_1";
  254. reg = <0x2b0000 0x1a0000>;
  255. read-only;
  256. };
  257. partition@450000 {
  258. label = "0:DEVCFG";
  259. reg = <0x450000 0x10000>;
  260. read-only;
  261. };
  262. partition@460000 {
  263. label = "mfginfo";
  264. reg = <0x460000 0x10000>;
  265. read-only;
  266. };
  267. partition@470000 {
  268. label = "0:RPM";
  269. reg = <0x470000 0x40000>;
  270. read-only;
  271. };
  272. partition@4b0000 {
  273. label = "0:RPM_1";
  274. reg = <0x4b0000 0x40000>;
  275. read-only;
  276. };
  277. partition@4f0000 {
  278. label = "0:CDT";
  279. reg = <0x4f0000 0x10000>;
  280. read-only;
  281. };
  282. partition@500000 {
  283. label = "0:CDT_1";
  284. reg = <0x500000 0x10000>;
  285. read-only;
  286. };
  287. partition@510000 {
  288. label = "0:APPSBLENV";
  289. reg = <0x510000 0x10000>;
  290. nvmem-layout {
  291. compatible = "u-boot,env";
  292. ethaddr: ethaddr {
  293. #nvmem-cell-cells = <0>;
  294. };
  295. eth1addr: eth1addr {
  296. #nvmem-cell-cells = <0>;
  297. };
  298. eth2addr: eth2addr {
  299. #nvmem-cell-cells = <0>;
  300. };
  301. eth5addr: eth5addr {
  302. #nvmem-cell-cells = <0>;
  303. };
  304. };
  305. };
  306. partition@520000 {
  307. label = "0:APPSBL";
  308. reg = <0x520000 0xa0000>;
  309. read-only;
  310. };
  311. partition@5c0000 {
  312. label = "0:APPSBL_1";
  313. reg = <0x5c0000 0xa0000>;
  314. read-only;
  315. };
  316. partition@660000 {
  317. label = "0:ART";
  318. reg = <0x660000 0x80000>;
  319. read-only;
  320. };
  321. };
  322. };
  323. };
  324. &qpic_bam {
  325. status = "okay";
  326. };
  327. &qpic_nand {
  328. status = "okay";
  329. nand@0 {
  330. reg = <0>;
  331. nand-ecc-strength = <4>;
  332. nand-ecc-step-size = <512>;
  333. nand-bus-width = <8>;
  334. partitions {
  335. compatible = "fixed-partitions";
  336. #address-cells = <1>;
  337. #size-cells = <1>;
  338. partition@0 {
  339. label = "rootfs";
  340. reg = <0x0 0x6000000>;
  341. };
  342. partition@6000000 {
  343. label = "rootfs_1";
  344. reg = <0x6000000 0x6000000>;
  345. };
  346. partition@c000000 {
  347. label = "NVRAM";
  348. reg = <0xc000000 0x3000000>;
  349. };
  350. partition@f000000 {
  351. label = "crashLog";
  352. reg = <0xf000000 0x1000000>;
  353. };
  354. };
  355. };
  356. };
  357. &wifi {
  358. status = "okay";
  359. qcom,ath11k-calibration-variant = "CambiumNetworks-XE34";
  360. nvmem-cell-names = "mac-address";
  361. nvmem-cells = <&eth2addr>;
  362. };
  363. &qusb_phy_1 {
  364. status = "okay";
  365. };
  366. &usb2 {
  367. status = "okay";
  368. };