ipq8071-mf269.dts 7.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #include "ipq8074-512m.dtsi"
  4. #include "ipq8074-ac-cpu.dtsi"
  5. #include "ipq8074-ess.dtsi"
  6. #include <dt-bindings/gpio/gpio.h>
  7. #include <dt-bindings/input/input.h>
  8. #include <dt-bindings/leds/common.h>
  9. / {
  10. model = "ZTE MF269";
  11. compatible = "zte,mf269", "qcom,ipq8074";
  12. aliases {
  13. serial0 = &blsp1_uart5;
  14. led-boot = &led_power;
  15. led-failsafe = &led_power;
  16. led-running = &led_power;
  17. led-upgrade = &led_power;
  18. label-mac-device = &dp6_syn;
  19. };
  20. chosen {
  21. stdout-path = "serial0:115200n8";
  22. bootargs-append = " root=/dev/ubiblock0_0";
  23. };
  24. keys {
  25. compatible = "gpio-keys";
  26. pinctrl-0 = <&button_pins>;
  27. pinctrl-names = "default";
  28. wps {
  29. label = "wps";
  30. linux,code = <KEY_WPS_BUTTON>;
  31. gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
  32. };
  33. reset {
  34. label = "reset";
  35. linux,code = <KEY_RESTART>;
  36. gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
  37. };
  38. };
  39. leds {
  40. compatible = "gpio-leds";
  41. led_power: power {
  42. function = LED_FUNCTION_POWER;
  43. color = <LED_COLOR_ID_WHITE>;
  44. gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
  45. };
  46. };
  47. };
  48. &tlmm {
  49. button_pins: button_pins {
  50. mux {
  51. pins = "gpio37", "gpio46";
  52. function = "gpio";
  53. drive-strength = <8>;
  54. bias-pull-up;
  55. };
  56. };
  57. i2c_pins: i2c-pins {
  58. pins = "gpio21", "gpio22";
  59. function = "blsp4_i2c1";
  60. drive-strength = <8>;
  61. bias-disable;
  62. };
  63. mdio_pins: mdio-pins {
  64. mdc {
  65. pins = "gpio68";
  66. function = "mdc";
  67. drive-strength = <8>;
  68. bias-pull-up;
  69. };
  70. mdio {
  71. pins = "gpio69";
  72. function = "mdio";
  73. drive-strength = <8>;
  74. bias-pull-up;
  75. };
  76. };
  77. usb_pwr_pins: usb_pwr_pins {
  78. mux {
  79. pins = "gpio29";
  80. function = "gpio";
  81. drive-strength = <8>;
  82. bias-disable;
  83. output-high;
  84. };
  85. };
  86. };
  87. &blsp1_spi1 {
  88. pinctrl-0 = <&spi_0_pins>;
  89. pinctrl-names = "default";
  90. cs-select = <0>;
  91. status = "okay";
  92. flash@0 {
  93. compatible = "jedec,spi-nor";
  94. reg = <0>;
  95. spi-max-frequency = <50000000>;
  96. partitions {
  97. compatible = "fixed-partitions";
  98. #address-cells = <1>;
  99. #size-cells = <1>;
  100. partition@0 {
  101. label = "0:sbl1";
  102. reg = <0x0 0x50000>;
  103. read-only;
  104. };
  105. partition@50000 {
  106. label = "0:mibib";
  107. reg = <0x50000 0x10000>;
  108. read-only;
  109. };
  110. partition@60000 {
  111. label = "0:bootconfig";
  112. reg = <0x60000 0x20000>;
  113. read-only;
  114. };
  115. partition@80000 {
  116. label = "0:bootconfig1";
  117. reg = <0x80000 0x20000>;
  118. read-only;
  119. };
  120. partition@a0000 {
  121. label = "0:qsee";
  122. reg = <0xa0000 0x180000>;
  123. read-only;
  124. };
  125. partition@220000 {
  126. label = "0:qsee_1";
  127. reg = <0x220000 0x180000>;
  128. read-only;
  129. };
  130. partition@3a0000 {
  131. label = "0:devcfg";
  132. reg = <0x3a0000 0x10000>;
  133. read-only;
  134. };
  135. partition@3b0000 {
  136. label = "0:devcfg_1";
  137. reg = <0x3b0000 0x10000>;
  138. read-only;
  139. };
  140. partition@3c0000 {
  141. label = "0:apdp";
  142. reg = <0x3c0000 0x10000>;
  143. read-only;
  144. };
  145. partition@3d0000 {
  146. label = "0:apdp_1";
  147. reg = <0x3d0000 0x10000>;
  148. read-only;
  149. };
  150. partition@3e0000 {
  151. label = "0:rpm";
  152. reg = <0x3e0000 0x40000>;
  153. read-only;
  154. };
  155. partition@420000 {
  156. label = "0:rpm_1";
  157. reg = <0x420000 0x40000>;
  158. read-only;
  159. };
  160. partition@460000 {
  161. label = "0:cdt";
  162. reg = <0x460000 0x10000>;
  163. read-only;
  164. };
  165. partition@470000 {
  166. label = "0:cdt_1";
  167. reg = <0x470000 0x10000>;
  168. read-only;
  169. };
  170. partition@480000 {
  171. label = "0:appsblenv";
  172. reg = <0x480000 0x10000>;
  173. };
  174. partition@490000 {
  175. label = "0:appsbl";
  176. reg = <0x490000 0xc0000>;
  177. read-only;
  178. };
  179. partition@550000 {
  180. label = "0:appsbl_1";
  181. reg = <0x550000 0xc0000>;
  182. read-only;
  183. };
  184. partition@610000 {
  185. label = "0:art";
  186. reg = <0x610000 0x40000>;
  187. read-only;
  188. };
  189. partition@650000 {
  190. label = "0:ethphyfw";
  191. reg = <0x650000 0x80000>;
  192. read-only;
  193. };
  194. };
  195. };
  196. };
  197. &blsp1_i2c5 {
  198. pinctrl-0 = <&i2c_pins>;
  199. pinctrl-names = "default";
  200. status = "okay";
  201. /* No driver exists */
  202. aw9106: gpio-expander@5b {
  203. reg = <0x5b>;
  204. reset-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  205. };
  206. };
  207. &blsp1_uart5 {
  208. status = "okay";
  209. };
  210. &cryptobam {
  211. status = "okay";
  212. };
  213. &crypto {
  214. status = "okay";
  215. };
  216. &prng {
  217. status = "okay";
  218. };
  219. &qpic_bam {
  220. status = "okay";
  221. };
  222. &qpic_nand {
  223. status = "okay";
  224. /*
  225. * Bootloader will find the NAND DT node by the compatible and
  226. * then "fixup" it by adding the partitions from the SMEM table
  227. * using the legacy bindings thus making it impossible for us
  228. * to change the partition table or utilize NVMEM for calibration.
  229. * So add a dummy partitions node that bootloader will populate
  230. * and set it as disabled so the kernel ignores it instead of
  231. * printing warnings due to the broken way bootloader adds the
  232. * partitions.
  233. */
  234. partitions {
  235. status = "disabled";
  236. };
  237. nand@0 {
  238. reg = <0>;
  239. nand-ecc-strength = <4>;
  240. nand-ecc-step-size = <512>;
  241. nand-bus-width = <8>;
  242. partitions {
  243. compatible = "fixed-partitions";
  244. #address-cells = <1>;
  245. #size-cells = <1>;
  246. partition@0 {
  247. label = "fota-flag";
  248. reg = <0x0000000 0x00a0000>;
  249. read-only;
  250. };
  251. partition@a0000 {
  252. label = "mac";
  253. reg = <0x00a0000 0x0080000>;
  254. read-only;
  255. nvmem-layout {
  256. compatible = "fixed-layout";
  257. #address-cells = <1>;
  258. #size-cells = <1>;
  259. macaddr_mac_0: macaddr@0 {
  260. compatible = "mac-base";
  261. reg = <0x0 0x6>;
  262. #nvmem-cell-cells = <1>;
  263. };
  264. };
  265. };
  266. partition@120000 {
  267. label = "cfg-param";
  268. reg = <0x0120000 0x1400000>;
  269. read-only;
  270. };
  271. partition@1520000 {
  272. label = "log";
  273. reg = <0x1520000 0x0600000>;
  274. read-only;
  275. };
  276. partition@1b20000 {
  277. label = "oops";
  278. reg = <0x1b20000 0x00a0000>;
  279. read-only;
  280. };
  281. partition@1bc0000 {
  282. label = "web";
  283. reg = <0x1bc0000 0x0800000>;
  284. read-only;
  285. };
  286. partition@23c0000 {
  287. label = "ubi_kernel";
  288. reg = <0x23c0000 0x3400000>;
  289. };
  290. partition@57c0000 {
  291. label = "0:wififw";
  292. reg = <0x57c0000 0x0800000>;
  293. read-only;
  294. };
  295. /* rootfs partition is the result of squashing
  296. * consecutive stock partitions:
  297. * - openwrt_data (25 MiB)
  298. * - data (30 MiB)
  299. * - fota (99 MiB)
  300. */
  301. partition@5fc0000 {
  302. label = "rootfs";
  303. reg = <0x5fc0000 0x9a00000>;
  304. };
  305. };
  306. };
  307. };
  308. &qusb_phy_0 {
  309. status = "okay";
  310. };
  311. &ssphy_0 {
  312. status = "okay";
  313. };
  314. &usb_0 {
  315. pinctrl-0 = <&usb_pwr_pins>;
  316. pinctrl-names = "default";
  317. status = "okay";
  318. };
  319. &mdio {
  320. status = "okay";
  321. pinctrl-0 = <&mdio_pins>;
  322. pinctrl-names = "default";
  323. qca8081_24: ethernet-phy@24 {
  324. compatible = "ethernet-phy-id004d.d101";
  325. reg = <24>;
  326. reset-deassert-us = <10000>;
  327. reset-gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
  328. };
  329. qca8081_28: ethernet-phy@28 {
  330. compatible = "ethernet-phy-id004d.d101";
  331. reg = <28>;
  332. reset-deassert-us = <10000>;
  333. reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
  334. };
  335. };
  336. &switch {
  337. status = "okay";
  338. switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
  339. switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
  340. switch_mac_mode1 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance1*/
  341. switch_mac_mode2 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance2*/
  342. qcom,port_phyinfo {
  343. port@5 {
  344. port_id = <5>;
  345. phy_address = <24>;
  346. port_mac_sel = "QGMAC_PORT";
  347. };
  348. port@6 {
  349. port_id = <6>;
  350. phy_address = <28>;
  351. port_mac_sel = "QGMAC_PORT";
  352. };
  353. };
  354. };
  355. &edma {
  356. status = "okay";
  357. };
  358. &dp5_syn {
  359. status = "okay";
  360. phy-handle = <&qca8081_24>;
  361. label = "lan";
  362. nvmem-cell-names = "mac-address";
  363. nvmem-cells = <&macaddr_mac_0 1>;
  364. };
  365. &dp6_syn {
  366. status = "okay";
  367. phy-handle = <&qca8081_28>;
  368. label = "wan";
  369. nvmem-cell-names = "mac-address";
  370. nvmem-cells = <&macaddr_mac_0 0>;
  371. };
  372. &wifi {
  373. status = "okay";
  374. qcom,ath11k-calibration-variant = "ZTE-MF269";
  375. qcom,ath11k-fw-memory-mode = <1>;
  376. };