ipq8072-301w.dts 9.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /* Copyright (c) 2021, Dirk Buchwalder <[email protected]> */
  3. /dts-v1/;
  4. #include "ipq8074.dtsi"
  5. #include "ipq8074-hk-cpu.dtsi"
  6. #include "ipq8074-ess.dtsi"
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/input/input.h>
  9. #include <dt-bindings/leds/common.h>
  10. / {
  11. model = "QNAP 301w";
  12. compatible = "qnap,301w", "qcom,ipq8074";
  13. aliases {
  14. serial0 = &blsp1_uart5;
  15. /*
  16. * Aliases as required by u-boot
  17. * to patch MAC addresses
  18. */
  19. led-boot = &led_system_red;
  20. led-failsafe = &led_system_red;
  21. led-running = &led_pwr_green;
  22. led-upgrade = &led_system_red;
  23. ethernet0 = &dp1;
  24. ethernet1 = &dp2;
  25. ethernet2 = &dp3;
  26. ethernet3 = &dp4;
  27. ethernet4 = &dp5;
  28. ethernet5 = &dp6_syn;
  29. label-mac-device = &dp1;
  30. };
  31. chosen {
  32. stdout-path = "serial0:115200n8";
  33. };
  34. keys {
  35. compatible = "gpio-keys";
  36. pinctrl-0 = <&button_pins>;
  37. pinctrl-names = "default";
  38. wps-button {
  39. label = "wps";
  40. gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
  41. linux,code = <KEY_WPS_BUTTON>;
  42. };
  43. reset-button {
  44. label = "reset";
  45. gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
  46. linux,code = <KEY_RESTART>;
  47. };
  48. };
  49. leds {
  50. compatible = "gpio-leds";
  51. pinctrl-0 = <&leds_pins>;
  52. pinctrl-names = "default";
  53. led_system_green: led-system-green {
  54. gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
  55. color = <LED_COLOR_ID_GREEN>;
  56. function = LED_FUNCTION_STATUS;
  57. };
  58. led_system_red: led-system-red {
  59. gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  60. color = <LED_COLOR_ID_RED>;
  61. function = LED_FUNCTION_STATUS;
  62. };
  63. led_pwr_green: led-pwr-green {
  64. gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
  65. color = <LED_COLOR_ID_GREEN>;
  66. function = LED_FUNCTION_POWER;
  67. };
  68. led-wifi-green {
  69. gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
  70. color = <LED_COLOR_ID_GREEN>;
  71. function = LED_FUNCTION_WLAN;
  72. };
  73. led-lan4-green {
  74. gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
  75. color = <LED_COLOR_ID_GREEN>;
  76. function = LED_FUNCTION_LAN;
  77. function-enumerator = <4>;
  78. };
  79. led-lan4-amber {
  80. gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
  81. color = <LED_COLOR_ID_AMBER>;
  82. function = LED_FUNCTION_LAN;
  83. function-enumerator = <4>;
  84. };
  85. led-lan3-green {
  86. gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
  87. color = <LED_COLOR_ID_GREEN>;
  88. function = LED_FUNCTION_LAN;
  89. function-enumerator = <3>;
  90. };
  91. led-lan3-amber {
  92. gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
  93. color = <LED_COLOR_ID_AMBER>;
  94. function = LED_FUNCTION_LAN;
  95. function-enumerator = <3>;
  96. };
  97. led-lan2-green {
  98. gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  99. color = <LED_COLOR_ID_GREEN>;
  100. function = LED_FUNCTION_LAN;
  101. function-enumerator = <2>;
  102. };
  103. led-lan2-amber {
  104. gpios = <&tlmm 13 GPIO_ACTIVE_HIGH>;
  105. color = <LED_COLOR_ID_AMBER>;
  106. function = LED_FUNCTION_LAN;
  107. function-enumerator = <2>;
  108. };
  109. led-lan1-green {
  110. gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
  111. color = <LED_COLOR_ID_GREEN>;
  112. function = LED_FUNCTION_LAN;
  113. function-enumerator = <1>;
  114. };
  115. led-lan1-amber {
  116. gpios = <&tlmm 15 GPIO_ACTIVE_HIGH>;
  117. color = <LED_COLOR_ID_AMBER>;
  118. function = LED_FUNCTION_LAN;
  119. function-enumerator = <1>;
  120. };
  121. led-10g-1-green {
  122. gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  123. color = <LED_COLOR_ID_GREEN>;
  124. function = "10g";
  125. function-enumerator = <1>;
  126. };
  127. led-10g-1-amber {
  128. gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
  129. color = <LED_COLOR_ID_AMBER>;
  130. function = "10g";
  131. function-enumerator = <1>;
  132. };
  133. led-10g-2-green {
  134. gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
  135. color = <LED_COLOR_ID_GREEN>;
  136. function = "10g";
  137. function-enumerator = <2>;
  138. };
  139. led-10g-2-amber {
  140. gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
  141. color = <LED_COLOR_ID_AMBER>;
  142. function = "10g";
  143. function-enumerator = <2>;
  144. };
  145. };
  146. };
  147. &tlmm {
  148. mdio_pins: mdio-state {
  149. mdc-pins {
  150. pins = "gpio68";
  151. function = "mdc";
  152. drive-strength = <8>;
  153. bias-pull-up;
  154. };
  155. mdio-pins {
  156. pins = "gpio69";
  157. function = "mdio";
  158. drive-strength = <8>;
  159. bias-pull-up;
  160. };
  161. };
  162. button_pins: button-state {
  163. wps-pins {
  164. pins = "gpio57";
  165. function = "gpio";
  166. drive-strength = <8>;
  167. bias-pull-up;
  168. };
  169. rst-pins {
  170. pins = "gpio67";
  171. function = "gpio";
  172. drive-strength = <8>;
  173. bias-pull-up;
  174. };
  175. };
  176. leds_pins: leds-state {
  177. pins = "gpio1", "gpio3", "gpio4", "gpio6", "gpio7", "gpio8",
  178. "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio42",
  179. "gpio51", "gpio52", "gpio54", "gpio56";
  180. function = "gpio";
  181. drive-strength = <8>;
  182. bias-pull-down;
  183. };
  184. };
  185. &blsp1_uart5 {
  186. status = "okay";
  187. };
  188. &prng {
  189. status = "okay";
  190. };
  191. &ssphy_0 {
  192. status = "okay";
  193. };
  194. &qusb_phy_0 {
  195. status = "okay";
  196. };
  197. &ssphy_1 {
  198. status = "okay";
  199. };
  200. &qusb_phy_1 {
  201. status = "okay";
  202. };
  203. &usb_0 {
  204. status = "okay";
  205. };
  206. &usb_1 {
  207. status = "okay";
  208. };
  209. &cryptobam {
  210. status = "okay";
  211. };
  212. &crypto {
  213. status = "okay";
  214. };
  215. &qpic_bam {
  216. status = "okay";
  217. };
  218. &blsp1_spi1 { /* BLSP1 QUP1 */
  219. pinctrl-0 = <&spi_0_pins>;
  220. pinctrl-names = "default";
  221. status = "okay";
  222. flash@0 {
  223. reg = <0>;
  224. compatible = "jedec,spi-nor";
  225. spi-max-frequency = <50000000>;
  226. partitions {
  227. compatible = "fixed-partitions";
  228. #address-cells = <1>;
  229. #size-cells = <1>;
  230. partition@0 {
  231. label = "0:sbl1";
  232. reg = <0x0 0x50000>;
  233. read-only;
  234. };
  235. partition@50000 {
  236. label = "0:mibib";
  237. reg = <0x50000 0x10000>;
  238. read-only;
  239. };
  240. partition@60000 {
  241. label = "0:qsee";
  242. reg = <0x60000 0x180000>;
  243. read-only;
  244. };
  245. partition@1e0000 {
  246. label = "0:devcfg";
  247. reg = <0x1e0000 0x10000>;
  248. read-only;
  249. };
  250. partition@1f0000 {
  251. label = "0:apdp";
  252. reg = <0x1f0000 0x10000>;
  253. read-only;
  254. };
  255. partition@200000 {
  256. label = "0:rpm";
  257. reg = <0x200000 0x40000>;
  258. read-only;
  259. };
  260. partition@240000 {
  261. label = "0:cdt";
  262. reg = <0x240000 0x10000>;
  263. read-only;
  264. };
  265. partition@250000 {
  266. label = "0:appsblenv";
  267. reg = <0x250000 0x20000>;
  268. };
  269. partition@270000 {
  270. label = "0:appsbl";
  271. reg = <0x250000 0x100000>;
  272. read-only;
  273. };
  274. partition@370000 {
  275. label = "0:art";
  276. reg = <0x370000 0x40000>;
  277. read-only;
  278. };
  279. partition@3b0000 {
  280. label = "0:ethphyfw1";
  281. reg = <0x3b0000 0x80000>;
  282. nvmem-layout {
  283. compatible = "fixed-layout";
  284. #address-cells = <1>;
  285. #size-cells = <1>;
  286. aqr0_fw: firmware@0 {
  287. reg = <0x0 0x5fc02>;
  288. };
  289. };
  290. };
  291. partition@430000 {
  292. label = "0:ethphyfw2";
  293. reg = <0x430000 0x80000>;
  294. nvmem-layout {
  295. compatible = "fixed-layout";
  296. #address-cells = <1>;
  297. #size-cells = <1>;
  298. aqr1_fw: firmware@0 {
  299. reg = <0x0 0x5fc02>;
  300. };
  301. };
  302. };
  303. partition@4b0000 {
  304. label = "reserved";
  305. reg = <0x4b0000 0x350000>;
  306. };
  307. };
  308. };
  309. };
  310. &mdio {
  311. status = "okay";
  312. pinctrl-0 = <&mdio_pins>;
  313. pinctrl-names = "default";
  314. reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
  315. aqr113c_0: ethernet-phy@0 {
  316. compatible ="ethernet-phy-ieee802.3-c45";
  317. reg = <0>;
  318. reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
  319. firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x0_ID44778_VER1630.cld";
  320. nvmem-cell-names = "firmware";
  321. nvmem-cells = <&aqr0_fw>;
  322. };
  323. aqr113c_8: ethernet-phy@8 {
  324. compatible ="ethernet-phy-ieee802.3-c45";
  325. reg = <8>;
  326. reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
  327. firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x8_ID44776_VER1630.cld";
  328. nvmem-cell-names = "firmware";
  329. nvmem-cells = <&aqr1_fw>;
  330. };
  331. ethernet-phy-package@16 {
  332. #address-cells = <1>;
  333. #size-cells = <0>;
  334. compatible = "qcom,qca8075-package";
  335. reg = <16>;
  336. qcom,package-mode = "qsgmii";
  337. qca8075_16: ethernet-phy@16 {
  338. compatible = "ethernet-phy-ieee802.3-c22";
  339. reg = <16>;
  340. };
  341. qca8075_17: ethernet-phy@17 {
  342. compatible = "ethernet-phy-ieee802.3-c22";
  343. reg = <17>;
  344. };
  345. qca8075_18: ethernet-phy@18 {
  346. compatible = "ethernet-phy-ieee802.3-c22";
  347. reg = <18>;
  348. };
  349. qca8075_19: ethernet-phy@19 {
  350. compatible = "ethernet-phy-ieee802.3-c22";
  351. reg = <19>;
  352. };
  353. };
  354. };
  355. &sdhc_1 {
  356. status = "okay";
  357. /* According to the stock dts from the QNAP gpl drop
  358. * the emmc has a problem with the hs400 > hs200 speed switch.
  359. * Therefore remove the mmc-hs400-1_8v property
  360. */
  361. /delete-property/ mmc-hs400-1_8v;
  362. mmc-hs200-1_8v;
  363. mmc-ddr-1_8v;
  364. vqmmc-supply = <&l11>;
  365. };
  366. &switch {
  367. status = "okay";
  368. switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; /* lan port bitmap */
  369. switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
  370. switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
  371. switch_mac_mode1 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance1*/
  372. switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
  373. qcom,port_phyinfo {
  374. port@0 {
  375. port_id = <1>;
  376. phy_address = <16>;
  377. };
  378. port@1 {
  379. port_id = <2>;
  380. phy_address = <17>;
  381. };
  382. port@2 {
  383. port_id = <3>;
  384. phy_address = <18>;
  385. };
  386. port@3 {
  387. port_id = <4>;
  388. phy_address = <19>;
  389. };
  390. port@4 {
  391. port_id = <5>;
  392. phy_address = <8>;
  393. compatible = "ethernet-phy-ieee802.3-c45";
  394. ethernet-phy-ieee802.3-c45;
  395. };
  396. port@5 {
  397. port_id = <6>;
  398. phy_address = <0>;
  399. compatible = "ethernet-phy-ieee802.3-c45";
  400. ethernet-phy-ieee802.3-c45;
  401. };
  402. };
  403. };
  404. &edma {
  405. status = "okay";
  406. };
  407. &dp1 {
  408. status = "okay";
  409. phy-mode = "qsgmii";
  410. phy-handle = <&qca8075_16>;
  411. label = "lan4";
  412. };
  413. &dp2 {
  414. status = "okay";
  415. phy-mode = "qsgmii";
  416. phy-handle = <&qca8075_17>;
  417. label = "lan3";
  418. };
  419. &dp3 {
  420. status = "okay";
  421. phy-mode = "qsgmii";
  422. phy-handle = <&qca8075_18>;
  423. label = "lan2";
  424. };
  425. &dp4 {
  426. status = "okay";
  427. phy-mode = "qsgmii";
  428. phy-handle = <&qca8075_19>;
  429. label = "lan1";
  430. };
  431. &dp5 {
  432. status = "okay";
  433. qcom,mactype = <1>;
  434. phy-mode = "usxgmii";
  435. phy-handle = <&aqr113c_8>;
  436. label = "10g-1";
  437. };
  438. &dp6_syn {
  439. status = "okay";
  440. phy-mode = "usxgmii";
  441. phy-handle = <&aqr113c_0>;
  442. label = "10g-2";
  443. };
  444. &wifi {
  445. status = "okay";
  446. qcom,ath11k-calibration-variant = "QNAP-301w";
  447. };