openwrt/target/linux/realtek/dts/rtl931x.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "macros.dtsi"
#include <dt-bindings/interrupt-controller/mips-gic.h>

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	compatible = "realtek,rtl838x-soc";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		frequency = <1000000000>;

		cpu@0 {
			compatible = "mti,interaptive";
			reg = <0>;
		};

		cpu@1 {
			compatible = "mti,interaptive";
			reg = <1>;
		};
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x10000000>;
	};

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
	};

	chosen {
		bootargs = "earlycon";
		stdout-path = "serial0:115200n8";
	};

	lx_clk: lx_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <200000000>;
	};

	cpc: cpc@1bde0000 {
		compatible = "mti,mips-cpc";
		reg = <0x1bde0000 0x8000>;
	};

	cpuclock: cpuclock@0 {
		#clock-cells = <0>;
		compatible = "fixed-clock";

		/* FIXME: there should be way to detect this */
		clock-frequency = <1000000000>;
	};

	cpuintc: cpuintc {
		compatible = "mti,cpu-interrupt-controller";
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
	};

	gic: interrupt-controller@1ddc0000 {
		compatible = "mti,gic";
		reg = <0x1ddc0000 0x20000>;

		interrupt-controller;
		#interrupt-cells = <3>;

		/*
		 * Declare the interrupt-parent even though the mti,gic
		 * binding doesn't require it, such that the kernel can
		 * figure out that cpu_intc is the root interrupt
		 * controller & should be probed first.
		 */
		interrupt-parent = <&cpuintc>;
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x18000000 0x20000>;

		ecc0: ecc@1a600 {
			compatible = "realtek,rtl9301-ecc";
			reg = <0x1a600 0x54>;

			status = "disabled";
		};

		spi0: spi@1200 {
			status = "okay";

			compatible = "realtek,rtl8380-spi";
			reg = <0x1200 0x100>;

			#address-cells = <1>;
			#size-cells = <0>;
		};

		snand: spi@1a400 {
			compatible = "realtek,rtl9301-snand";
			reg = <0x1a400 0x44>;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&lx_clk>;
			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";
		};

		watchdog0: watchdog@3260 {
			compatible = "realtek,rtl9310-wdt";
			reg = <0x3260 0xc>;

			realtek,reset-mode = "soc";

			clocks = <&lx_clk>;
			timeout-sec = <30>;

			interrupt-parent = <&gic>;
			interrupt-names = "phase1", "phase2";
			interrupts = <GIC_SHARED 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SHARED 9 IRQ_TYPE_LEVEL_HIGH>;
		};

		gpio0: gpio-controller@3300 {
			compatible = "realtek,rtl9310-gpio", "realtek,otto-gpio";
			reg = <0x3300 0x1c>;

			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <32>;

			interrupt-controller;
			#interrupt-cells = <3>;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
		};

		timer0: timer@3200 {
			compatible = "realtek,rtl931x-timer", "realtek,otto-timer";
			reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
			      <0x3230 0x10>, <0x3240 0x10>, <0x3250 0x10>;

			interrupt-parent = <&gic>;
			interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>, <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>, <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&lx_clk>;
                };

		uart0: uart@2000 {
			compatible = "ns16550a";
			reg = <0x2000 0x100>;

			clock-frequency = <200000000>;

			interrupt-parent = <&gic>;
			#interrupt-cells = <3>;
			interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;
		};

		uart1: uart@2100 {
			compatible = "ns16550a";
			reg = <0x2100 0x100>;

			clock-frequency = <200000000>;

			interrupt-parent = <&gic>;
			#interrupt-cells = <3>;
			interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;

			status = "disabled";
		};
	};

	switchcore@1b000000 {
		compatible = "syscon", "simple-mfd";
		reg = <0x1b000000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;

		ethernet0: ethernet {
			compatible = "realtek,rtl9311-eth";
			interrupt-parent = <&gic>;
			interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <3>;
			phy-mode = "internal";

			pinctrl-0 = <&pinmux_disable_ext_cpu>;
			pinctrl-names = "default";

			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};

		i2c_mst1: i2c@100c {
			compatible = "realtek,rtl9310-i2c";
			reg = <0x100c 0x18>;
			#address-cells = <1>;
			#size-cells = <0>;
			realtek,scl = <0>;

			status = "disabled";
		};

		i2c_mst2: i2c@1024 {
			compatible = "realtek,rtl9310-i2c";
			reg = <0x1024 0x18>;
			#address-cells = <1>;
			#size-cells = <0>;
			realtek,scl = <1>;

			status = "disabled";
		};

		mdio_ctrl: mdio-controller {
			compatible = "realtek,rtl9311-mdio", "realtek,otto-mdio";
			#address-cells = <1>;
			#size-cells = <0>;

			mdio_bus0: mdio-bus@0 {
				reg = <0>;
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		mdio_aux: mdio-aux {
			compatible = "realtek,rtl9310-aux-mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-0 = <&pinmux_gpio_mdio_en>;
			pinctrl-names = "default";

			status = "disabled";
		};

		mdio_serdes: mdio-serdes {
			compatible = "realtek,rtl9311-serdes-mdio", "realtek,otto-serdes-mdio";
		};

		pcs {
			compatible = "realtek,rtl9311-pcs", "realtek,otto-pcs";
			#address-cells = <1>;
			#size-cells = <0>;

			serdes0: serdes@0 {
				reg = <0>;
			};
			serdes1: serdes@1 {
				reg = <1>;
			};
			serdes2: serdes@2 {
				reg = <2>;
			};
			serdes3: serdes@3 {
				reg = <3>;
			};
			serdes4: serdes@4 {
				reg = <4>;
			};
			serdes5: serdes@5 {
				reg = <5>;
			};
			serdes6: serdes@6 {
				reg = <6>;
			};
			serdes7: serdes@7 {
				reg = <7>;
			};
			serdes8: serdes@8 {
				reg = <8>;
			};
			serdes9: serdes@9 {
				reg = <9>;
			};
			serdes10: serdes@10 {
				reg = <10>;
			};
			serdes11: serdes@11 {
				reg = <11>;
			};
			serdes12: serdes@12 {
				reg = <12>;
			};
			serdes13: serdes@13 {
				reg = <13>;
			};
		};
	};

	pinmux@1b00103c {
		compatible = "pinctrl-single";
		reg = <0x1b00103c 0x4>;

		pinctrl-single,bit-per-mux;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x1>;
		#pinctrl-cells = <2>;

		/* 31.25 MHz SPI master clock */
		pinmux_spi0_31mhz: spi0-31mhz {
			pinctrl-single,bits = <0x0 0x1800 0x3800>;
		};

		/* Enable GPIO 8, 9, 10 */
		pinmux_disable_spi0: disable-spi0 {
			pinctrl-single,bits = <0x0 0x0 0x400>;
		};

		/* Enable GPIO 12 */
		pinmux_disable_spi0_cs1: disable-spi-cs1 {
			pinctrl-single,bits = <0x0 0x0 0x200>;
		};

		/* Enable GPIO 11 */
		pinmux_disable_spi0_cs0: disable-spi-cs0 {
			pinctrl-single,bits = <0x0 0x0 0x100>;
		};
	};

	pinmux@1b001358 {
		compatible = "pinctrl-single";
		reg = <0x1b001358 0x4>;

		pinctrl-single,bit-per-mux;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x1>;
		#pinctrl-cells = <2>;

		/* Enable GPIO 31 */
		pinmux_disable_led_sync: disable-led-sync {
			pinctrl-single,bits = <0x0 0x0 0x10000>;
		};

		pinmux_enable_led_sync: enable-led-sync {
			pinctrl-single,bits = <0x0 0x10000 0x10000>;
		};

		pinmux_enable_mdc_mdio_3: enable-mdc-mdio-3 {
			pinctrl-single,bits = <0x0 0x1000 0x1000>;
		};

		pinmux_enable_mdc_mdio_2: enable-mdc-mdio-2 {
			pinctrl-single,bits = <0x0 0x800 0x800>;
		};

		pinmux_enable_mdc_mdio_1: enable-mdc-mdio-1 {
			pinctrl-single,bits = <0x0 0x400 0x400>;
		};

		pinmux_enable_mdc_mdio_0: enable-mdc-mdio-0 {
			pinctrl-single,bits = <0x0 0x200 0x200>;
		};

		/* Enable GPIO6 and GPIO7, possibly unknown others */
		pinmux_disable_jtag: disable_jtag {
			pinctrl-single,bits = <0x0 0x0 0x8000>;
		};

		/* Controls GPIO0 */
		pinmux_disable_sys_led: disable_sys_led {
			pinctrl-single,bits = <0x0 0x0 0x100>;
		};

		pinmux_disable_ext_cpu: disable-ext-cpu {
			pinctrl-single,bits = <0x0 0x0 0x4>;
		};
	};

	pinmux@1b0007d4 {
		compatible = "pinctrl-single";
		reg = <0x1b0007d4 0x4>;

		pinctrl-single,bit-per-mux;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x1>;
		#pinctrl-cells = <2>;

		pinmux_gpio_mdio_en: gpio-mdio-en {
			pinctrl-single,bits = <0x0 0x100 0x100>;
		};
	};

	switch0: switch@1b000000 {
		compatible = "realtek,rtl83xx-switch";
		status = "okay";

		interrupt-parent = <&gic>;
		#interrupt-cells = <3>;
		interrupts = <GIC_SHARED 15 IRQ_TYPE_LEVEL_HIGH>;
	};
};