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+diff -urN linux-2.6.21.1/arch/mips/au1000/common/gpio.c linux-2.6.21.1.new/arch/mips/au1000/common/gpio.c
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+--- linux-2.6.21.1/arch/mips/au1000/common/gpio.c 2007-04-27 23:49:26.000000000 +0200
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++++ linux-2.6.21.1.new/arch/mips/au1000/common/gpio.c 2007-05-22 21:41:55.000000000 +0200
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+@@ -1,4 +1,7 @@
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+ /*
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++ * Copyright (C) 2007, OpenWrt.org, Florian Fainelli <[email protected]>
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++ * Architecture specific GPIO support
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++ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+@@ -18,101 +21,133 @@
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 675 Mass Ave, Cambridge, MA 02139, USA.
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++ *
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++ * Notes :
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++ * au1000 SoC have only one GPIO line : GPIO1
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++ * others have a second one : GPIO2
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+ */
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++
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++#include <linux/autoconf.h>
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++#include <linux/init.h>
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++#include <linux/types.h>
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+ #include <linux/module.h>
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+-#include <au1000.h>
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+-#include <au1xxx_gpio.h>
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++
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++#include <asm/addrspace.h>
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++#include <asm/io.h>
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++
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++#include <asm/mach-au1x00/au1000.h>
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++#include <asm/gpio.h>
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+
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+ #define gpio1 sys
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+ #if !defined(CONFIG_SOC_AU1000)
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+ static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
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++#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
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+
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+-#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
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+-
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+-int au1xxx_gpio2_read(int signal)
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++static int au1xxx_gpio2_read(unsigned gpio)
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+ {
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+- signal -= 200;
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+-/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
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+- return ((gpio2->pinstate >> signal) & 0x01);
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++ gpio -= AU1XXX_GPIO_BASE;
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++ return ((gpio2->pinstate >> gpio) & 0x01);
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+ }
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+
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+-void au1xxx_gpio2_write(int signal, int value)
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++static void au1xxx_gpio2_write(unsigned gpio, int value)
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+ {
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+- signal -= 200;
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++ gpio -= AU1XXX_GPIO_BASE;
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+
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+- gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
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+- (value << signal);
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++ gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) |
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++ (value << gpio);
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+ }
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+
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+-void au1xxx_gpio2_tristate(int signal)
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++static int au1xxx_gpio2_direction_input(unsigned gpio)
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+ {
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+- signal -= 200;
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+- gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
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++ gpio -= AU1XXX_GPIO_BASE;
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++ gpio2->dir &= ~(0x01 << gpio);
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++ return 0;
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+ }
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+-#endif
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+
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+-int au1xxx_gpio1_read(int signal)
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++static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
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++{
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++ gpio -= AU1XXX_GPIO_BASE;
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++ gpio2->dir = (0x01 << gpio) | (value << gpio);
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++ return 0;
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++}
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++
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++#endif /* !defined(CONFIG_SOC_AU1000) */
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++
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++static int au1xxx_gpio1_read(unsigned gpio)
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+ {
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+-/* gpio1->trioutclr |= (0x01 << signal); */
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+- return ((gpio1->pinstaterd >> signal) & 0x01);
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++ return ((gpio1->pinstaterd >> gpio) & 0x01);
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+ }
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+
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+-void au1xxx_gpio1_write(int signal, int value)
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++static void au1xxx_gpio1_write(unsigned gpio, int value)
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+ {
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+ if(value)
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+- gpio1->outputset = (0x01 << signal);
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++ gpio1->outputset = (0x01 << gpio);
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+ else
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+- gpio1->outputclr = (0x01 << signal); /* Output a Zero */
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++ /* Output a zero */
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++ gpio1->outputclr = (0x01 << gpio);
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+ }
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+
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+-void au1xxx_gpio1_tristate(int signal)
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++static int au1xxx_gpio1_direction_input(unsigned gpio)
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+ {
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+- gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
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++ gpio1->pininputen = (0x01 << gpio);
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++ return 0;
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+ }
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+
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++static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
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++{
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++ gpio1->trioutclr = (0x01 & gpio);
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++ return 0;
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++}
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+
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+-int au1xxx_gpio_read(int signal)
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++int au1xxx_gpio_get_value(unsigned gpio)
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+ {
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+- if(signal >= 200)
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++ if(gpio >= AU1XXX_GPIO_BASE)
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+ #if defined(CONFIG_SOC_AU1000)
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+ return 0;
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+ #else
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+- return au1xxx_gpio2_read(signal);
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++ return au1xxx_gpio2_read(gpio);
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+ #endif
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+ else
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+- return au1xxx_gpio1_read(signal);
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++ return au1xxx_gpio1_read(gpio);
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+ }
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+
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+-void au1xxx_gpio_write(int signal, int value)
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++void au1xxx_gpio_set_value(unsigned gpio, int value)
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+ {
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+- if(signal >= 200)
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++ if(gpio >= AU1XXX_GPIO_BASE)
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+ #if defined(CONFIG_SOC_AU1000)
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+ ;
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+ #else
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+- au1xxx_gpio2_write(signal, value);
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++ au1xxx_gpio2_write(gpio, value);
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+ #endif
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+ else
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+- au1xxx_gpio1_write(signal, value);
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++ au1xxx_gpio1_write(gpio, value);
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+ }
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+
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+-void au1xxx_gpio_tristate(int signal)
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++int au1xxx_gpio_direction_input(unsigned gpio)
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+ {
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+- if(signal >= 200)
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++ if (gpio >= AU1XXX_GPIO_BASE)
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+ #if defined(CONFIG_SOC_AU1000)
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+ ;
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+ #else
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+- au1xxx_gpio2_tristate(signal);
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++ return au1xxx_gpio2_direction_input(gpio);
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+ #endif
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+ else
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+- au1xxx_gpio1_tristate(signal);
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++ return au1xxx_gpio1_direction_input(gpio);
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+ }
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+
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+-void au1xxx_gpio1_set_inputs(void)
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++int au1xxx_gpio_direction_output(unsigned gpio, int value)
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+ {
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+- gpio1->pininputen = 0;
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++ if (gpio >= AU1XXX_GPIO_BASE)
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++#if defined(CONFIG_SOC_AU1000)
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++ ;
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++#else
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++ return au1xxx_gpio2_direction_output(gpio, value);
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++#endif
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++ else
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++ return au1xxx_gpio1_direction_output(gpio, value);
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+ }
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+
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+-EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
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+-EXPORT_SYMBOL(au1xxx_gpio_tristate);
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+-EXPORT_SYMBOL(au1xxx_gpio_write);
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+-EXPORT_SYMBOL(au1xxx_gpio_read);
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++EXPORT_SYMBOL(au1xxx_gpio_direction_output);
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++EXPORT_SYMBOL(au1xxx_gpio_direction_input);
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++EXPORT_SYMBOL(au1xxx_gpio_get_value);
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++EXPORT_SYMBOL(au1xxx_gpio_set_value);
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+--- linux-2.6.21.1/arch/mips/Kconfig 2007-04-27 23:49:26.000000000 +0200
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++++ linux-2.6.21.1.new/arch/mips/Kconfig 2007-05-21 08:04:42.000000000 +0200
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+@@ -1044,6 +1044,7 @@
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select SYS_SUPPORTS_APM_EMULATION
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+ select SYS_SUPPORTS_KGDB
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++ select GENERIC_GPIO
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+
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+ config PNX8550
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+ bool
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+diff -urN linux-2.6.21.1/include/asm-mips/mach-au1x00/au1xxx_gpio.h linux-2.6.21.1.new/include/asm-mips/mach-au1x00/au1xxx_gpio.h
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+--- linux-2.6.21.1/include/asm-mips/mach-au1x00/au1xxx_gpio.h 2007-04-27 23:49:26.000000000 +0200
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++++ linux-2.6.21.1.new/include/asm-mips/mach-au1x00/au1xxx_gpio.h 1970-01-01 01:00:00.000000000 +0100
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+@@ -1,20 +0,0 @@
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+-#ifndef __AU1XXX_GPIO_H
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+-#define __AU1XXX_GPIO_H
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+-
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+-void au1xxx_gpio1_set_inputs(void);
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+-void au1xxx_gpio_tristate(int signal);
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+-void au1xxx_gpio_write(int signal, int value);
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+-int au1xxx_gpio_read(int signal);
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+-
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+-typedef volatile struct
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+-{
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+- u32 dir;
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+- u32 reserved;
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+- u32 output;
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+- u32 pinstate;
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+- u32 inten;
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+- u32 enable;
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+-
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+-} AU1X00_GPIO2;
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+-
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+-#endif //__AU1XXX_GPIO_H
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+diff -urN linux-2.6.21.1/include/asm-mips/mach-au1x00/gpio.h linux-2.6.21.1.new/include/asm-mips/mach-au1x00/gpio.h
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+--- linux-2.6.21.1/include/asm-mips/mach-au1x00/gpio.h 1970-01-01 01:00:00.000000000 +0100
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++++ linux-2.6.21.1.new/include/asm-mips/mach-au1x00/gpio.h 2007-05-21 01:10:22.000000000 +0200
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+@@ -0,0 +1,69 @@
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++#ifndef _AU1XXX_GPIO_H_
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++#define _AU1XXX_GPIO_H_
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++
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++#define AU1XXX_GPIO_BASE 200
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++
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++typedef volatile struct
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++{
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++ u32 dir;
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++ u32 reserved;
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++ u32 output;
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++ u32 pinstate;
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++ u32 inten;
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++ u32 enable;
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++
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++} AU1X00_GPIO2;
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++
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++extern int au1xxx_gpio_get_value(unsigned gpio);
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++extern void au1xxx_gpio_set_value(unsigned gpio, int value);
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++extern int au1xxx_gpio_direction_input(unsigned gpio);
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++extern int au1xxx_gpio_direction_output(unsigned gpio, int value);
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++
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++
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++/* Wrappers for the arch-neutral GPIO API */
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++
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++static inline int gpio_request(unsigned gpio, const char *label)
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++{
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++ /* Not yet implemented */
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++ return 0;
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++}
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++
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++static inline void gpio_free(unsigned gpio)
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++{
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++ /* Not yet implemented */
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++}
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++
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++static inline int gpio_direction_input(unsigned gpio)
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++{
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++ return au1xxx_gpio_direction_input(gpio);
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++}
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++
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++static inline int gpio_direction_output(unsigned gpio, int value)
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++{
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++ return au1xxx_gpio_direction_output(gpio, value);
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++}
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++
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++static inline int gpio_get_value(unsigned gpio)
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++{
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++ return au1xxx_gpio_get_value(gpio);
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++}
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++
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++static inline void gpio_set_value(unsigned gpio, int value)
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++{
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++ au1xxx_gpio_set_value(gpio, value);
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++}
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++
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++static inline int gpio_to_irq(unsigned gpio)
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++{
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++ return gpio;
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++}
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++
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++static inline int irq_to_gpio(unsigned irq)
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++{
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++ return irq;
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++}
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++
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++/* For cansleep */
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++#include <asm-generic/gpio.h>
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++
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++#endif /* _AU1XXX_GPIO_H_ */
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Florian Fainelli