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@@ -5,6 +5,7 @@
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* - MikroTik RouterBOARD 941L-2nD
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* - MikroTik RouterBOARD 951Ui-2nD
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* - MikroTik RouterBOARD 952Ui-5ac2nD
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+ * - MikroTik RouterBOARD 962UiGS-5HacT2HnT
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* - MikroTik RouterBOARD 750UP r2
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* - MikroTik RouterBOARD 750 r2
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* - MikroTik RouterBOARD LHG 5nD
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@@ -18,6 +19,8 @@
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* identifier.
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*
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* Copyright (C) 2017 Thibaut VARENE <[email protected]>
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+ * Copyright (C) 2016 David Hutchison <[email protected]>
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+ * Copyright (C) 2017 Ryan Mounce <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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@@ -36,6 +39,8 @@
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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+#include <linux/ar8216_platform.h>
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+
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#include <asm/prom.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/ath79.h>
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@@ -130,6 +135,7 @@ static struct flash_platform_data rbspi_spi_flash_data = {
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/* Several boards only have a single reset button wired to GPIO 16 */
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#define RBSPI_GPIO_BTN_RESET16 16
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+#define RBSPI_GPIO_BTN_RESET20 20
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static struct gpio_keys_button rbspi_gpio_keys_reset16[] __initdata = {
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{
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@@ -142,6 +148,17 @@ static struct gpio_keys_button rbspi_gpio_keys_reset16[] __initdata = {
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},
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};
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+static struct gpio_keys_button rbspi_gpio_keys_reset20[] __initdata = {
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+ {
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+ .desc = "Reset button",
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+ .type = EV_KEY,
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+ .code = KEY_RESTART,
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+ .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL,
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+ .gpio = RBSPI_GPIO_BTN_RESET20,
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+ .active_low = 1,
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+ },
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+};
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+
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/* RB mAP L-2nD gpios */
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#define RBMAPL_GPIO_LED_POWER 17
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#define RBMAPL_GPIO_LED_USER 14
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@@ -235,6 +252,83 @@ static struct gpio_led rb952_leds[] __initdata = {
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},
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};
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+
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+/* RB 962UiGS-5HacT2HnT gpios */
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+#define RB962_GPIO_POE_STATUS 2
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+#define RB962_GPIO_POE_POWER 3
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+#define RB962_GPIO_LED_USER 12
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+#define RB962_GPIO_USB_POWER 13
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+
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+static struct gpio_led rb962_leds_gpio[] __initdata = {
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+ {
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+ .name = "rb:green:user",
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+ .gpio = RB962_GPIO_LED_USER,
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+ .active_low = 1,
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+ },
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+};
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+
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+static const struct ar8327_led_info rb962_leds_ar8327[] __initconst = {
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+ AR8327_LED_INFO(PHY0_0, HW, "rb:green:port1"),
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+ AR8327_LED_INFO(PHY1_0, HW, "rb:green:port2"),
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+ AR8327_LED_INFO(PHY2_0, HW, "rb:green:port3"),
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+ AR8327_LED_INFO(PHY3_0, HW, "rb:green:port4"),
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+ AR8327_LED_INFO(PHY4_0, HW, "rb:green:port5"),
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+};
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+
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+static struct ar8327_pad_cfg rb962_ar8327_pad0_cfg = {
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+ .mode = AR8327_PAD_MAC_RGMII,
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+ .txclk_delay_en = true,
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+ .rxclk_delay_en = true,
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+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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+ .mac06_exchange_dis = true,
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+};
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+
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+static struct ar8327_pad_cfg rb962_ar8327_pad6_cfg = {
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+ /* Use SGMII interface for GMAC6 of the AR8337 switch */
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+ .mode = AR8327_PAD_MAC_SGMII,
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+ .rxclk_delay_en = true,
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+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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+};
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+
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+static struct ar8327_led_cfg rb962_ar8327_led_cfg = {
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+ .led_ctrl0 = 0xc737c737,
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+ .led_ctrl1 = 0x00000000,
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+ .led_ctrl2 = 0x00000000,
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+ .led_ctrl3 = 0x0030c300,
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+ .open_drain = false,
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+};
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+
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+static struct ar8327_platform_data rb962_ar8327_data = {
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+ .pad0_cfg = &rb962_ar8327_pad0_cfg,
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+ .pad6_cfg = &rb962_ar8327_pad6_cfg,
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+ .port0_cfg = {
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+ .force_link = 1,
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+ .speed = AR8327_PORT_SPEED_1000,
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+ .duplex = 1,
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+ .txpause = 1,
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+ .rxpause = 1,
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+ },
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+ .port6_cfg = {
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+ .force_link = 1,
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+ .speed = AR8327_PORT_SPEED_1000,
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+ .duplex = 1,
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+ .txpause = 1,
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+ .rxpause = 1,
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+ },
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+ .led_cfg = &rb962_ar8327_led_cfg,
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+ .num_leds = ARRAY_SIZE(rb962_leds_ar8327),
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+ .leds = rb962_leds_ar8327,
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+};
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+
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+static struct mdio_board_info rb962_mdio0_info[] = {
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+ {
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+ .bus_id = "ag71xx-mdio.0",
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+ .phy_addr = 0,
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+ .platform_data = &rb962_ar8327_data,
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+ },
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+};
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+
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/* RB wAP-2nD gpios */
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#define RBWAP_GPIO_LED_USER 14
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#define RBWAP_GPIO_LED_WLAN 11
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@@ -685,6 +779,68 @@ static void __init rb750upr2_setup(void)
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rbspi_952_750r2_setup(flags);
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}
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+/*
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+ * Init the hAP ac / 962UiGS-5HacT2HnT hardware (QCA9558).
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+ * The hAP ac has 5 ethernet ports provided by an AR8337 switch. Port 1 is
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+ * assigned to WAN, ports 2-5 are assigned to LAN. Port 0 is connected to the
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+ * SoC, ports 1-5 of the switch are connected to physical ports 1-5 in order.
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+ * The SFP cage is not assigned by default on RouterOS. Extra work is required
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+ * to support this interface as it is directly connected to the SoC (eth1).
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+ * Wireless is provided by a 2.4GHz radio on the SoC (WLAN1) and a 5GHz radio
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+ * attached via PCI (QCA9880). Red and green WLAN LEDs are populated however
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+ * they are not attached to GPIOs, extra work is required to support these.
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+ * PoE and USB output power control is supported.
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+ */
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+static void __init rb962_setup(void)
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+{
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+ u32 flags = RBSPI_HAS_USB | RBSPI_HAS_POE | RBSPI_HAS_PCI;
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+
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+ if (rbspi_platform_setup())
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+ return;
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+
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+ rbspi_peripherals_setup(flags);
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+
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+ /* Do not call rbspi_network_setup as we have a discrete switch chip */
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+ ath79_eth0_pll_data.pll_1000 = 0xae000000;
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+ ath79_eth0_pll_data.pll_100 = 0xa0000101;
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+ ath79_eth0_pll_data.pll_10 = 0xa0001313;
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+
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+ ath79_register_mdio(0, 0x0);
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+ mdiobus_register_board_info(rb962_mdio0_info,
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+ ARRAY_SIZE(rb962_mdio0_info));
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+
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+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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+
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+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
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+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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+ ath79_eth0_data.phy_mask = BIT(0);
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+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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+ ath79_register_eth(0);
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+
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+ /* WLAN1 MAC is HW MAC + 7 */
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+ rbspi_wlan_init(1, 7);
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+
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+ if (flags & RBSPI_HAS_USB)
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+ gpio_request_one(RB962_GPIO_USB_POWER,
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+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
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+ "USB power");
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+
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+ /* PoE output GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */
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+ if (flags & RBSPI_HAS_POE)
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+ gpio_request_one(RB962_GPIO_POE_POWER,
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+ GPIOF_OUT_INIT_HIGH | GPIOF_ACTIVE_LOW |
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+ GPIOF_EXPORT_DIR_FIXED,
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+ "POE power");
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+
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+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb962_leds_gpio),
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+ rb962_leds_gpio);
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+
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+ /* This device has a single reset button as gpio 20 */
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+ ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
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+ ARRAY_SIZE(rbspi_gpio_keys_reset20),
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+ rbspi_gpio_keys_reset20);
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+}
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+
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/*
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* Init the LHG hardware (AR9344).
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* The LHG 5nD has a single ethernet port connected to PHY0.
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@@ -781,6 +937,7 @@ static void __init rbmap_setup(void)
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup);
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup);
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup);
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+MIPS_MACHINE_NONAME(ATH79_MACH_RB_962, "962", rb962_setup);
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2, "750-hb", rb750upr2_setup);
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5, "lhg", rblhg_setup);
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP, "wap-hb", rbwap_setup);
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Ryan Mounce